ZHCSQP4K December   2008  – June 2022 LM25088 , LM25088-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM25088
    3. 6.3 ESD Ratings: LM25088-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High Voltage Low-Dropout Regulator
      2. 7.3.2  Line Undervoltage Detector
      3. 7.3.3  Oscillator and Sync Capability
      4. 7.3.4  Error Amplifier and PWM Comparator
      5. 7.3.5  Ramp Generator
      6. 7.3.6  Dropout Voltage Reduction
      7. 7.3.7  Frequency Dithering (LM25088-1 Only)
      8. 7.3.8  Cycle-by-Cycle Current Limit
      9. 7.3.9  Overload Protection Timer (LM25088-2 Only)
      10. 7.3.10 Soft Start
      11. 7.3.11 HG Output
      12. 7.3.12 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 EN Pin Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Timing Resistor
        2. 8.2.2.2  Output Inductor
        3. 8.2.2.3  Current Sense Resistor
        4. 8.2.2.4  Ramp Capacitor
        5. 8.2.2.5  Output Capacitors
        6. 8.2.2.6  Input Capacitors
        7. 8.2.2.7  VCC Capacitor
        8. 8.2.2.8  Bootstrap Capacitor
        9. 8.2.2.9  Soft-Start Capacitor
        10. 8.2.2.10 Output Voltage Divider
        11. 8.2.2.11 UVLO Divider
        12. 8.2.2.12 Restart Capacitor (LM5008-2 Only)
        13. 8.2.2.13 MOSFET Selection
        14. 8.2.2.14 Diode Selection
        15. 8.2.2.15 Snubber Components Selection
        16. 8.2.2.16 Error Amplifier Compensation
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Thermal Considerations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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Dropout Voltage Reduction

The LM25088 features unique circuitry to reduce the dropout voltage. Dropout voltage is defined as the difference between the minimum input voltage to maintain regulation and the output voltage (VIN(min) – VOUT). Dropout voltage thus determines the lowest input voltage at which the converter maintains regulation. In a buck converter, dropout voltage primarily depends upon the maximum duty cycle. The maximum duty cycle is dependent on the oscillator frequency and minimum off time.

An approximation for the dropout voltage is:

Equation 4. GUID-922C63C0-0643-4099-8258-9AC934F2433E-low.gif

where

  • TOSC is 1 / fSW.
  • TOFF (max) is the forced off time (280-ns typical, 365-ns maximum).
  • fSW and TOSC are the oscillator frequency and oscillator period, respectively.

From the above equation, it can be seen that for a given output voltage, reducing the dropout voltage requires either reducing the forced off time or oscillator frequency (1 / tOSC). The forced off time is limited by the time required to replenish the bootstrap capacitor and time required to sample the re-circulating diode current. The 365-ns forced off time of the LM25088 controller is a good trade-off between these two requirements. Thus, the LM25088 reduces dropout voltage by dynamically decreasing the operating frequency during dropout. The dynamic frequency control (DFC) is achieved using a dropout monitor, which detects a dropout condition and reduces the operating frequency. The operating frequency continues to decrease with decreasing input voltage until the frequency falls to the minimum value set by the DFC circuitry.

Equation 5. fSW(minDFC) ≊ 1/3 × fSW(nominal)

If the VIN voltage continues to fall below this point, output regulation can no longer be maintained. The oscillator frequency reverts back to the nominal operating frequency set by the RT resistor when the input voltage increases above the dropout range. DFC circuitry does not affect the PWM during normal operating conditions.

GUID-198A5680-3B0B-4065-A768-625908137009-low.gifFigure 7-4 Dropout Voltage Reduction using Dynamic Frequency Control