4 修订历史记录
Changes from A Revision (June 2013) to B Revision
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Added 器件信息,ESD 额定值表,特性 描述,器件功能模式,应用和实施,电源相关建议,布局,器件和文档支持以及机械、封装和可订购信息部分Go
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已删除 SDA 与 SCL 之间的走线,并已在首页图中添补缺失的 VS 连接点 Go
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Added (VIN+) + (VIN–) / 2 to common-mode analog inputs in the Absolute Maximum Ratings table Go
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Deleted VBUS from analog inputs in Absolute Maximum Ratings table Go
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Added operating temperature to Absolute Maximum Ratings tableGo
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Changed all VSENSE to VSHUNT throughout data sheet for consistencyGo
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Changed "Status register" to "Mask/Enable register" to clarify register name in Basic ADC Functions sectionGo
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Changed Critical Alert section text for clarity. Go
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Added Summation Control Function sectionGo
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Changed external "RPU" to "RPU_ext" in Figure 22Go
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Changed Multiple Channel Monitoring section text for clarity. Go
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Added X and Y axis labels to Figure 25Go
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Changed "bidirectional" to "I/O" in second paragraph of Bus Overview sectionGo
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Changed VS+ to VS in Table 1Go
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Changed references in Figure 30 to point to correct notesGo
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Changed Figure 31Go
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Changed values in Table 2, Bus Timing DefinitionsGo
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Added data valid time to Table 2, Bus Timing DefinitionsGo
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Changed fall time to split data and clock times in Table 2, Bus Timing DefinitionsGo
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Deleted rise time for data in Table 2, Bus Timing DefinitionsGo
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Deleted trace from SDA to SCL, and added missing connector dot to VS in Figure 53 Go
Changes from * Revision (May 2012) to A Revision
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Changed Shunt voltage input range parameter values in Electrical Characteristics tableGo
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Updated Figure 19Go
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Changed second paragraph of Serial Bus Address sectionGo
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Updated Figure 27 and note (1)Go
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Updated Figure 28 and note (1)Go
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Updated Figure 29 and note (1)Go
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Updated Figure 30 and note (1)Go
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Changed bit D15 in Power Valid Upper Limit RegisterGo
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Changed bit D15 in Power Valid Lower Limit RegisterGo