ZHCS766B February 2012 – January 2025 INA230
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| INPUT | ||||||
| Shunt voltage input range | –81.92 | 81.9175 | mV | |||
| CMRR | Common-mode rejection | VCM = 0 V to 36 V, TA = –40°C to 125°C | 120 | 140 | dB | |
| Vos | Shunt offset voltage | VCM = 12 V | –9.8 | ±25 | µV | |
| dVos/dT | Shunt offset voltage drift | TA = –40°C to +125°C | ±0.05 | ±0.1 | µV/°C | |
| PSRRSHUNT | Power supply rejection ratio (Current measurements) |
–3.0 | µV/V | |||
| Vos_b | Bus offset Voltage | +2.3 | ±15 | mV | ||
| dVos_b/dT | Bus offset voltage drift | TA = –40°C to +125°C | ±40 | µV/°C | ||
| PSRRBUS | Power supply rejection ratio (Voltage measurements) |
0.4 | mV/V | |||
| ZBUS | BUS input impedance | 830 | kΩ | |||
| IB | Input bias current (DGS Package) | IN+, IN-, Current measurement mode | 10 | µA | ||
| Input bias current (RGT Package) | IN+, IN-, Current measurement mode | 0.1 | nA | |||
| IB_SHDWN | Input Leakage | IN+, IN-, Shutdown Mode | 0.1 | 0.5 | µA | |
| DC ACCURACY | ||||||
| ADC Resolution | TA = –40°C to 125°C | 16 | Bits | |||
| 1 LSB step size | Shunt Voltage | 2.5 | µV | |||
| 1 LSB step size | Bus Voltage | 1.25 | mV | |||
| ADC Conversion-time |
CT bit = 000 | 140 | 154 | µs | ||
| CT bit = 001 | 204 | 224 | µs | |||
| CT bit = 010 | 332 | 365 | µs | |||
| CT bit = 011 | 588 | 646 | µs | |||
| CT bit = 100 | 1.100 | 1.21 | ms | |||
| CT bit = 101 | 2.116 | 2.328 | ms | |||
| CT bit = 110 | 4.156 | 4.572 | ms | |||
| CT bit = 111 | 8.244 | 9.068 | ms | |||
| GSERR | Shunt voltage gain error | ±0.010 | ±0.3 | % | ||
| GS_DRFT | Shunt voltage gain error drift | TA = –40°C to +125°C | 10 | 50 | ppm/°C | |
| GBERR | Bus voltage gain error | ±0.010 | ±0.3 | % | ||
| GB_DRFT | Bus voltage gain error drift | TA = –40°C to +125°C | 10 | 50 | ppm/°C | |
| DNL | Differential Non-Linearity | ±0.1 | LSB | |||
| POWER SUPPLY | ||||||
| IQ | Quiescent current | VSENSE = 0 mV | 330 | 420 | µA | |
| Shutdown | 0.5 | 2 | µA | |||
| SMBUS | ||||||
| SMBUS timeout | 28 | 35 | ms | |||
| DIGITAL INPUT / OUTPUT | ||||||
| Input capacitance | 3 | pF | ||||
| VIH | Logic input level, high | 0.7 × VS | 6 | V | ||
| VIL | Logic input level, low | –0.5 | 0.3 × VS | V | ||
| VHYS | Hysteresis | 500 | mV | |||
| VOL | Logic output level, low | IOL = 3 mA | 0 | 0.4 | V | |
| Digital leakage input current | 0 ≤ VINPUT ≤ VS | 0.1 | 1 | µA | ||