ZHCS766B February   2012  – January 2025 INA230

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements (I2C)
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Basic ADC Functions
      2. 7.3.2 Power Calculation
      3. 7.3.3 Alert Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 Averaging and Conversion Time Considerations
      2. 7.4.2 Filtering and Input Considerations
    5. 7.5 Programming
      1. 7.5.1 Programming the Calibration Register
      2. 7.5.2 Programming the INA230 Power Measurement Engine
        1. 7.5.2.1 Calibration Register and Scaling
      3. 7.5.3 Simple Current Shunt Monitor Usage (No Programming Necessary)
      4. 7.5.4 Default INA230 Settings
      5. 7.5.5 Bus Overview
        1. 7.5.5.1 Serial Bus Address
        2. 7.5.5.2 Serial Interface
      6. 7.5.6 Writing to and Reading From the I2C Serial Interface
        1. 7.5.6.1 High-Speed I2C Mode
      7. 7.5.7 SMBus Alert Response
    6. 7.6 Register Maps
      1. 7.6.1 Configuration Register (00h, Read/Write)
      2. 7.6.2 AVG Bit Settings [11:9]
      3. 7.6.3 VBUS CT Bit Settings [8:6]
      4. 7.6.4 VSH CT Bit Settings [5:3]
      5. 7.6.5 Mode Settings [2:0]
      6. 7.6.6 Data Output Register
        1. 7.6.6.1 Shunt Voltage Register (01h, Read-Only)
        2. 7.6.6.2 Bus Voltage Register (02h, Read-Only) #GUID-A37EA2E7-DC60-42D5-94EF-920B5CD5B7A9/SBOS5477597
        3. 7.6.6.3 Power Register (03h, Read-Only)
        4. 7.6.6.4 Current Register (04h, Read-Only)
        5. 7.6.6.5 Calibration Register (05h, Read/Write)
        6. 7.6.6.6 Mask/Enable Register (06h, Read/Write)
        7. 7.6.6.7 Alert Limit Register (07h, Read/Write)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Sensing Circuit Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RGT|16
  • DGS|10
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.5.7 SMBus Alert Response

The INA230 is designed to respond to the SMBus alert response address. The SMBus alert response provides a quick fault identification for simple target devices. When an alert occurs, the controller can broadcast the alert response target address (0001 100) with the Read/Write bit set high. Following this alert response, any target devices that generated an alert identify themselves by acknowledging the alert response and sending the respective address on the bus.

The alert response can activate several different target devices simultaneously, similar to the I2C general call. If more than one target attempts to respond, bus arbitration rules apply. The losing device does not generate an acknowledge and continues to hold the ALERT line low until the interrupt is cleared.