ZHCSI69B june   2018  – september 2020 DS90C189-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Typical Application Diagrams
  6. 5 Revision History
  7. 6 Pin Configuration and Functions
    1.     DS90C189 Pin Descriptions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Recommended Input Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 AC Timing Diagrams
    9. 7.9 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 AEC-Q100 Qualified
      2. 8.3.2 ESD Protection
      3. 8.3.3 Operating Modes
      4. 8.3.4 LVDS Configurations
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Configuration
      2. 8.4.2 Single Pixel Input / Single Pixel Output
      3. 8.4.3 Single Pixel Input / Dual Pixel Output
      4. 8.4.4 Pixel Clock Edge Select (RFB)
      5. 8.4.5 Power Management
      6. 8.4.6 Sleep Mode (PDB)
      7. 8.4.7 LVDS Outputs
      8. 8.4.8 LVCMOS Inputs
    5. 8.5 Programming
      1. 8.5.1 LVDS Interface / TFT Color Data Recommended Mapping
        1. 8.5.1.1 Color Mapping Information
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 LVDS Interconnect Guidelines
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
    1. 10.1 Power Up Sequence
    2. 10.2 Power Supply Filtering
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  14. 13Mechanical, Packaging, and Orderable Information

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7.5 Electrical Characteristics

Over recommended operating supply and temperature ranges unless otherwise specified.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
LVCMOS DC SPECIFICATIONS
VIHHigh Level Input Voltage0.66VDDVDDV
VILLow Level Input VoltageGND0.35VDDV
IINInput CurrentVIN = 0V or VDD = 1.71 V to 1.89 V- 10±1+10µA
LVDS DRIVER DC SPECIFICATIONS
VODDifferential Output VoltageRL = 100Ω
VODSEL = VDD160
(320)		340
(680)		500
(1000)		mV
(mVP-P)
VODSEL = VGND110
(220)		220
(440)		400
(800)		mV
(mVP-P)
ΔVODChange in VOD between Complimentary Output StatesRL = 100Ω
See Figure 7-3		50mV
VOSOffset VoltageRL = 100Ω
See Figure 7-3		1.091.221.36V
ΔVOSChange in VOS between Complimentary Output StatesRL = 100Ω
See Figure 7-3		50mV
IOSOutput Short-Circuit CurrentVOUT = GND, VODSEL = VDD−15.5mA
SUPPLY CURRENT
IDDT1Worst Case Supply Current (includes load current)Checkerboard pattern,
RL = 100 Ω,
VODSEL = VDD,
VDD = 1.89 V,
See Checker Board Test Pattern		f = 105 MHz,
MODE0 = GND
(SISO)		5085mA
IDDT2f = 185 MHz,
MODE0 = VDD
(SIDO)		80140mA
IDDTPSupply Current PRBS-7MODE0 = VDD
(SIDO),
f = 150 MHz,
RL = 100 Ω,
PRBS-7 Pattern
See Typ Current Draw - Single In/Dual Out Mode - PRBS-7 Data Pattern.		VODSEL = GND,
VDD = 1.8		50mA
VODSEL = VDD,
VDD = 1.8		70mA
IDDTGSupply Current 16 GrayscaleMODE0 = VDD
(SIDO),
f = 150 MHz,
RL = 100 Ω,
16 Grayscale Pattern		VODSEL = GND,
VDD = 1.8		53mA
VODSEL = VDD,
VDD = 1.8		71mA
IDDZPower Down Supply CurrentPDB = GND6800µA