ZHCSIP0G November   2009  – November 2022 CDC3RL02

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low Additive Noise
      2. 8.3.2 Regulated 1.8-V Externally Available I/O Supply
      3. 8.3.3 Ultra-Small 8-bump YFP 0.4-mm Pitch WCSP Package
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Clock Squarer
      2. 9.1.2 Output Stage
      3. 9.1.3 LDO
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 术语表
  11. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

特性

  • 低附加噪声:
    • 10kHz 偏移相位噪声时为 –149dBc/Hz
    • 0.37ps (RMS) 输出抖动
  • 限制输出转换率可降低 EMI
    (对于 10pF 至 50pF 的负载,上升/下降时间为 1ns 至 5ns)
  • 自适应输出级控制反射
  • 稳压 1.8V 外部可用 I/O 电源
  • 超小型 8 凸点 YFP 0.4mm 间距 WCSP
    (0.8mm × 1.6mm)
  • ESD 性能超过 JESD 22
    • 2000V 人体放电模型 (A114-A)
    • 1000V 充电器件模型
      (JESD22-C101-A III 级)