Place the components to optimize the layout. For example, group the high-power components like cell pads, PACK+ and PACK– pads, power FETs, and RSNS together, allowing the layout to optimize the power traces for the best thermal heat spreading.
Separate the device's VSS and low-power components to a low-current ground plane. Both grounds can meet at RSNS.
Place the VDD RC filter close to the device's VDD pin.