ZHCSJF0 February 2019 ADC3244E
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DIS CLK FILT | 0 | 0 | 0 | 0 | 0 | 0 | PDN SYSREF |
R/W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | R/W-0h |
LEGEND: R/W = Read/Write; R = Read only; W = Write only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | DIS CLK FILT | R/W | 0h | Set this bit to improve wake-up time from global power-down mode; see the Improving Wake-Up Time From Global Power-Down section for details. |
6-1 | 0 | W | 0h | Must write 0 |
0 | PDN SYSREF | R/W | 0h | If the SYSREF pins are not used in the system, the SYSREF buffer must be powered down by setting this bit.
0 = Normal operation 1 = Powers down the SYSREF buffer |