ZHCSIP5 August 2018 PGA305
PRODUCTION DATA.
The accurate reference is used to generate reference voltage for the P ADC, T ADC and DAC. TI recommends to place a 100-nF capacitor on the REFCAP pin to limit the bandwidth of reference noise.
The user can set the ADC_EN_VREF bit in the ALPWR register to 0 to disable the accurate reference buffer. This allows the user to connect an external single-ended reference voltage to the REFCAP pin and then supply the reference voltage to the ADCs and the DAC. Note that the default power-up state of ADC_EN_VREF is such that the reference buffer is disabled.
NOTE
The accurate reference is valid 50 µs after the digital core starts running at power up.