Home Schnittstelle Highspeed-SerDes Serializer/Deserializer für FPD-Link

DS90UH925Q-Q1

AKTIV

Serializer für FPD-Link III, 5–85 MHz, 24 Bit Farbtiefe, mit HDCP

Produktdetails

Applications In-vehicle Infotainment (IVI) Input compatibility LVCMOS Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 24 Features HDCP EMI reduction SSC Compatible Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
Applications In-vehicle Infotainment (IVI) Input compatibility LVCMOS Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 24 Features HDCP EMI reduction SSC Compatible Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RHS) 48 49 mm² 7 x 7
  • Integrated HDCP Cipher Engine with On-chip Key
    Storage
  • Bidirectional Control Interface Channel Interface
    with I2C Compatible Serial Control Bus
  • Supports High Definition (720p) Digital Video
    Format
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5 to 85 MHz PCLK Supported
  • Single 3.3V Operation with 1.8 V or 3.3 V Compatible
    LVCMOS I/O Interface
  • AC-coupled STP Interconnect up to 10 meters
  • Parallel LVCMOS Video Inputs
  • DC-balanced & Scrambled Data with Embedded
    Clock
  • HDCP Content Protected
  • Supports HDCP Repeater Application
  • Internal Pattern Generation
  • Low Power Modes Minimize Power Dissipation
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • > 8k V HBM and ISO 10605 ESD rating
  • Backward Compatible Modes
  • Integrated HDCP Cipher Engine with On-chip Key
    Storage
  • Bidirectional Control Interface Channel Interface
    with I2C Compatible Serial Control Bus
  • Supports High Definition (720p) Digital Video
    Format
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5 to 85 MHz PCLK Supported
  • Single 3.3V Operation with 1.8 V or 3.3 V Compatible
    LVCMOS I/O Interface
  • AC-coupled STP Interconnect up to 10 meters
  • Parallel LVCMOS Video Inputs
  • DC-balanced & Scrambled Data with Embedded
    Clock
  • HDCP Content Protected
  • Supports HDCP Repeater Application
  • Internal Pattern Generation
  • Low Power Modes Minimize Power Dissipation
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • > 8k V HBM and ISO 10605 ESD rating
  • Backward Compatible Modes

The DS90UH925Q-Q1 serializer, in conjunction with the DS90UH926Q-Q1 deserializer, provides a solution for secure distribution of content-protected digital video within automotive entertainment systems. This chipset translates a parallel RGB Video Interface into a single pair high-speed serialized interface. The digital video data is protected using the industry standard HDCP copy protection scheme. The serial bus scheme, FPD-Link III, supports video and audio data transmission and full duplex control including I2C communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

The DS90UH925Q-Q1 serializer embeds the clock, content protects the data payload, and level shifts the signals to high-speed low voltage differential signaling. Up to 24 RGB data bits are serialized along with three video control signals and up to two I2S data inputs.

EMI is minimized by the use of low voltage differential signaling, data scrambling and randomization and spread spectrum clocking compatibility.

The HDCP cipher engine is implemented in the serializer and deserializer. HDCP keys are stored in on-chip memory.

The DS90UH925Q-Q1 serializer, in conjunction with the DS90UH926Q-Q1 deserializer, provides a solution for secure distribution of content-protected digital video within automotive entertainment systems. This chipset translates a parallel RGB Video Interface into a single pair high-speed serialized interface. The digital video data is protected using the industry standard HDCP copy protection scheme. The serial bus scheme, FPD-Link III, supports video and audio data transmission and full duplex control including I2C communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

The DS90UH925Q-Q1 serializer embeds the clock, content protects the data payload, and level shifts the signals to high-speed low voltage differential signaling. Up to 24 RGB data bits are serialized along with three video control signals and up to two I2S data inputs.

EMI is minimized by the use of low voltage differential signaling, data scrambling and randomization and spread spectrum clocking compatibility.

The HDCP cipher engine is implemented in the serializer and deserializer. HDCP keys are stored in on-chip memory.

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DS90UH925AQ-Q1 AKTIV Serializer für FPD-Link III, 5 bis 85 MHz, 24 Bit Farbtiefe, mit HDCP Similar to DS90UH925Q-Q1 with addition of a local output pin for remote interrupt mirroring from deserializer

Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet DS90UH925Q-Q1 720p 24-bit Color FPD-Link III Serializer with HDCP datasheet (Rev. J) PDF | HTML 07 Nov 2014
Application note Exploring the Int Test Pattern Generation Feature of FPD-Link III IVI Devices (Rev. G) PDF | HTML 03 Nov 2020
Application note Enabling GPIOs in DS90UB925 and DS90UB926 10 Nov 2015
Application note Using the I2S Audio Interface of DS90Ux92x FPD-Link III Devices 04 Mai 2013
Application note I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) 26 Apr 2013
User guide DS90UH925QSEVB User's Guide 20 Sep 2012

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

DS90UH925QSEVB — DS90UH925QSEVB-Evaluierungsplatine

The DS90UH925QSEVB is an evaluation board designed to demonstrate the performance and unique features of the DS90UH925Q FPD-Link III serializer.

The DS90UH925QSEVB board is designed to drive any of TI’s compatible FPD-Link III deserializer devices. The LVCMOS inputs of the DS90UH925Q are accessible (...)

Benutzerhandbuch: PDF
Anwendungssoftware und Frameworks

ALP Analog LaunchPad Framework Utility

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
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Support-Software

ALP-PROFILE-UPDATE Analog LaunchPad Profile Update Software

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
Unterstützte Produkte und Hardware

Unterstützte Produkte und Hardware

Simulationsmodell

DS90UH925Q IBIS Model

SNLM118.ZIP (67 KB) - IBIS Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese Design- und Simulationssuite mit vollem Funktionsumfang verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
Referenzdesigns

TIDA-00169 — TFT-LCD-Displaylösung für Fahrzeuge

This reference design implements a video over LVDS solution for automotive infotainment applications.It highlights the support of multi-touch with haptic feedback, LCD backlight control, and ambient light sensing, without the introduction of dedicated support lines back to the host processor. This (...)
Design guide: PDF
Schaltplan: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
WQFN (RHS) 48 Ultra Librarian

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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Support und Schulungen

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