DS90UH941AS-Q1

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2K-DSI-zu-FPD-Link III-Brückenserializer mit Videosplitting und HDCP

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Datenblatt

document-pdfAcrobat DS90UH941AS-Q1 2K DSI to FPD-Link III Bridge Serializer w/ Video Split and HDCP datasheet (Rev. B) (Englisch) PDF | HTML

DS90UH941AS-Q1

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Applications

In-vehicle Infotainment (IVI)

Input compatibility

MIPI DSI

Function

Serializer

Output compatibility

FPD-Link III LVDS

Color depth (bpp)

24

Features

HDCP

Signal conditioning

Adaptive Equalizer

EMI reduction

BIST

Diagnostics

BIST

Rating

Automotive

Operating temperature range (°C)

-40 to 105

TI functional safety category

Functional Safety-Capable

Applications

In-vehicle Infotainment (IVI)

Input compatibility

MIPI DSI

Function

Serializer

Output compatibility

FPD-Link III LVDS

Color depth (bpp)

24

Features

HDCP

Signal conditioning

Adaptive Equalizer

EMI reduction

BIST

Diagnostics

BIST

Rating

Automotive

Operating temperature range (°C)

-40 to 105

TI functional safety category

Functional Safety-Capable

VQFNP (RTD)

64

81 mm² (9 mm × 9 mm)

AEC-Q100 qualified for automotive applications with the following results:
- Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
- Dual DSI input ports with up to 4 data lanes each
- Up to 1.5 Gbps per lane
- Superframe with symmetric and asymmetric unpacking capability
- ECC and CRC generation
- Virtual channel capability
Single and dual FPD-Link III outputs
- Single link: up to 105MHz pixel clock
- Dual link: up to 210MHz pixel clock
Functional Safety-Capable
- Documentation available to aid ISO 26262 system design
Symmetric and asymmetric video splitting
Integrated HDCP v1.4 cipher engine with on-chip key storage

AEC-Q100 qualified for automotive applications with the following results:
- Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
- Dual DSI input ports with up to 4 data lanes each
- Up to 1.5 Gbps per lane
- Superframe with symmetric and asymmetric unpacking capability
- ECC and CRC generation
- Virtual channel capability
Single and dual FPD-Link III outputs
- Single link: up to 105MHz pixel clock
- Dual link: up to 210MHz pixel clock
Functional Safety-Capable
- Documentation available to aid ISO 26262 system design
Symmetric and asymmetric video splitting
Integrated HDCP v1.4 cipher engine with on-chip key storage

The DS90UH941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UH940N-Q1, DS90UH948-Q1, DS90UH924-Q1, DS90UH926-Q1, or DS90UH928-Q1 deserializer, the DS90UH941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50- Ω, single-ended coaxial cables or over 100- Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UH941AS-Q1 can support symmetric and asymmetric splitting.

The DS90UH941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.

The DS90UH941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UH940N-Q1, DS90UH948-Q1, DS90UH924-Q1, DS90UH926-Q1, or DS90UH928-Q1 deserializer, the DS90UH941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50- Ω, single-ended coaxial cables or over 100- Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UH941AS-Q1 can support symmetric and asymmetric splitting.

The DS90UH941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.

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Technische Dokumentation

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Alle anzeigen 3

Top-Dokumentation	Typ	Titel	Format-Optionen	Datum
*	Datenblatt	DS90UH941AS-Q1 2K DSI to FPD-Link III Bridge Serializer w/ Video Split and HDCP datasheet (Rev. B)	PDF \| HTML	01.02.2021
	Anwendungshinweis	Splitter Mode Operations With the DS90Ux941ASQ1 (Rev. A)	PDF \| HTML	27.10.2020
	Anwendungshinweis	DS90UB941AS-Q1 DSI Bringup Guide	PDF \| HTML	31.07.2020

Design und Entwicklung

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Evaluierungsplatine

DS90UH941AS-Q1EVM — Bridge-Serializer von DSI zu FPD-Link III – Evaluierungsmodul

Das DS90Ux941AS-Q1EVM (Evaluierungsmodul) konvertiert von DSI in FPD-Link III. Dieses Kit demonstriert die Funktionalität und den Betrieb des DS90Ux941AS-Q1. Der DS90Ux941AS-Q1 ist ein Serialisierer von DSI zu FPD-Link III, der in Verbindung mit den Deserialisierern DS90Ux940N-1 und DS90Ux948-1 (...)

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