Home Schnittstelle Highspeed-SerDes Serializer/Deserializer für FPD-Link
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Highspeed-SerDes
Serializer/Deserializer für FPD-Link

DS90UB902Q-Q1

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FPD-Link III Deserializer mit bidirektionalem Steuerkanal, 10 bis 43 MHz, 14 bit Farbtiefe

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Datenblatt

DS90UB902Q-Q1

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Applications In-vehicle Infotainment (IVI) Input compatibility FPD-Link III LVDS Function Deserializer Output compatibility LVCMOS Color depth (bpp) 14 Features Low-EMI Point-to-Point Communication Signal conditioning Programmable Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
Applications In-vehicle Infotainment (IVI) Input compatibility FPD-Link III LVDS Function Deserializer Output compatibility LVCMOS Color depth (bpp) 14 Features Low-EMI Point-to-Point Communication Signal conditioning Programmable Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RTA) 40 36 mm² 6 x 6
  • 10 MHz to 43 MHz Input PCLK Support
  • 160 Mbps to 688 Mbps Data Throughput
  • Single Differential Pair Interconnect
  • Bidirectional Control Interface Channel with I2C Support
  • Embedded Clock with DC Balanced Coding to Support AC-Coupled Interconnects
  • Capable to Drive up to 10 Meters Shielded Twisted-Pair
  • I2C Compatible Serial Interface
  • Single Hardware Device Addressing Pin
  • 16-bit Data Payload with CRC (Cyclic Redundancy Check) for Checking Data Integrity
  • Up to 6 Programmable GPIO's
  • LOCK Output Reporting Pin and AT-SPEED BIST Diagnosis Feature to Validate Link Integrity
  • Integrated Termination Resistors
  • 1.8V- or 3.3V-Compatible Parallel Bus Interface
  • Single Power Supply at 1.8V
  • ISO 10605 ESD and IEC 61000-4-2 ESD Compliant
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • Temperature Range −40°C to +105°C
  • No Reference Clock Required on Deserializer
  • Programmable Receive Equalization
  • EMI/EMC Mitigation
    • DES Programmable Spread Spectrum (SSCG) Outputs
    • DES Receiver Staggered Outputs

All trademarks are the property of their respective owners.

  • 10 MHz to 43 MHz Input PCLK Support
  • 160 Mbps to 688 Mbps Data Throughput
  • Single Differential Pair Interconnect
  • Bidirectional Control Interface Channel with I2C Support
  • Embedded Clock with DC Balanced Coding to Support AC-Coupled Interconnects
  • Capable to Drive up to 10 Meters Shielded Twisted-Pair
  • I2C Compatible Serial Interface
  • Single Hardware Device Addressing Pin
  • 16-bit Data Payload with CRC (Cyclic Redundancy Check) for Checking Data Integrity
  • Up to 6 Programmable GPIO's
  • LOCK Output Reporting Pin and AT-SPEED BIST Diagnosis Feature to Validate Link Integrity
  • Integrated Termination Resistors
  • 1.8V- or 3.3V-Compatible Parallel Bus Interface
  • Single Power Supply at 1.8V
  • ISO 10605 ESD and IEC 61000-4-2 ESD Compliant
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • Temperature Range −40°C to +105°C
  • No Reference Clock Required on Deserializer
  • Programmable Receive Equalization
  • EMI/EMC Mitigation
    • DES Programmable Spread Spectrum (SSCG) Outputs
    • DES Receiver Staggered Outputs

All trademarks are the property of their respective owners.

The DS90UB901Q/DS90UB902Q chipset offers a FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single differential pair. The Serializer/Deserializer pair is targeted for direct connections between automotive camera systems and Host Controller/Electronic Control Unit (ECU). The primary transport sends 16 bits of image data over a single high-speed serial stream together with a low latency bidirectional control channel transport that supports I2C. Included with the 16-bit payload is a selectable data integrity option for CRC (Cyclic Redundancy Check) to monitor transmission link errors. Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical bidirectional control information without the dependency of video blanking intervals. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

In addition, the Deserializer inputs provide equalization control to compensate for loss from the media over longer distances. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.

A Serializer standby function provides a low power-savings mode with a remote wake up capability for signaling of a remote device.

The Serializer is offered in a 32-pin WQFN (5mm x 5mm) package, and Deserializer is offered in a 40-pin WQFN (6mm x 6mm) package.

The DS90UB901Q/DS90UB902Q chipset offers a FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single differential pair. The Serializer/Deserializer pair is targeted for direct connections between automotive camera systems and Host Controller/Electronic Control Unit (ECU). The primary transport sends 16 bits of image data over a single high-speed serial stream together with a low latency bidirectional control channel transport that supports I2C. Included with the 16-bit payload is a selectable data integrity option for CRC (Cyclic Redundancy Check) to monitor transmission link errors. Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical bidirectional control information without the dependency of video blanking intervals. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

In addition, the Deserializer inputs provide equalization control to compensate for loss from the media over longer distances. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.

A Serializer standby function provides a low power-savings mode with a remote wake up capability for signaling of a remote device.

The Serializer is offered in a 32-pin WQFN (5mm x 5mm) package, and Deserializer is offered in a 40-pin WQFN (6mm x 6mm) package.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet DS90UB901Q/2Q 10-43MHz 14Bit Color FPD-Link III SER/DES datasheet (Rev. E) 16 Apr 2013
Application note I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) 26 Apr 2013
Application note Driving High-Speed Data Against the Traffic 11 Jul 2011

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Anwendungssoftware und Frameworks

ALP — Analog LaunchPad Framework Utility

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
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Support-Software

ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
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Simulationsmodell

DS90UB902Q IBIS Model

SNLM106.ZIP (140 KB) - IBIS Model
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Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese Design- und Simulationssuite mit vollem Funktionsumfang verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
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Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
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Referenzdesigns

TIDA-00138 — Unkomprimierter digitaler Video-SerDes über verdrilltes Leiterpaar für Fahrzeug-Kamerasysteme

The TIDA-00138 reference design is a high speed serial camera interface to connect a remote automotive camera module to a display or machine  vision processing system. It uses TIs FPD-Link III SerDes technology to transmit uncompressed video data and bidirectional control signals over a twisted (...)
Design guide: PDF
Schaltplan: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
WQFN (RTA) 40 Ultra Librarian
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Bestellen & Qualität

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  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
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  • Werksstandort
  • Montagestandort

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