The DS90UB940N-Q1 is a FPD-Link III deserializer which, together with
the DS90UB949/947/929-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a
MIPI® CSI-2 format. The deserializer can operate over cost-effective,
50-Ω, single-ended coaxial or 100-Ω, differential shielded twisted-pair (STP) cables. The device
recovers the data from one or two FPD-Link III serial streams and translates the data into a Camera
Serial Interface (CSI-2) format that can support video resolutions up to WUXGA and 1080p60 with
24-bit color depth.
The FPD-Link III interface supports video and audio data transmission and full duplex
control, including I2C and SPI communication, over the same differential link. Consolidation of
video data and control over two differential pairs decreases the interconnect size and weight and
simplifies the system design. EMI is minimized by the use of low voltage differential signaling,
data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and
720p resolutions with 24-bit color depth over a single differential link.
The device automatically senses the FPD-Link III channels and supplies a clock alignment
and de-skew functionality without the need for any special training patterns. This ensures skew
phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair
length differences, and connector imbalances.
The DS90UB940N-Q1 is a FPD-Link III deserializer which, together with
the DS90UB949/947/929-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a
MIPI® CSI-2 format. The deserializer can operate over cost-effective,
50-Ω, single-ended coaxial or 100-Ω, differential shielded twisted-pair (STP) cables. The device
recovers the data from one or two FPD-Link III serial streams and translates the data into a Camera
Serial Interface (CSI-2) format that can support video resolutions up to WUXGA and 1080p60 with
24-bit color depth.
The FPD-Link III interface supports video and audio data transmission and full duplex
control, including I2C and SPI communication, over the same differential link. Consolidation of
video data and control over two differential pairs decreases the interconnect size and weight and
simplifies the system design. EMI is minimized by the use of low voltage differential signaling,
data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and
720p resolutions with 24-bit color depth over a single differential link.
The device automatically senses the FPD-Link III channels and supplies a clock alignment
and de-skew functionality without the need for any special training patterns. This ensures skew
phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair
length differences, and connector imbalances.