The DS90UB954-Q1 is a
versatile dual
deserializer hub
capable of receiving serialized sensor data from one or two independent source s through an FPD-Link
III interface. When paired with a DS90UB953-Q1
serializer, the DS90UB954-Q1 receives
data from imagers, supporting 2MP/60fps and 4MP/30fps cameras as well as
satellite RADAR and other sensors such as ToF and LIDAR. Data is received and
aggregated into a MIPI CSI-2 compliant output for interconnect to a downstream
processor. For
sensors with DS90UB933-Q1 and DS90UB913A-Q1 serializers, the DS90UB954-Q1 receives and
aggregates data from one or two sensors including Full HD 1080p 2MP 60/fps
imager sensors. When configuring the CSI-2 interface for 2-lane operation,
a duplicate MIPI CSI-2 clock lane is available to provide a replicated output.
Replication mode creates two copies of the aggregated video stream
for data logging and parallel processing.
The DS90UB954-Q1 and partner
DS90UB953-Q1 chipset
is AEC-Q100 qualified and designed to receive data across either
50-Ω single-ended coaxial or 100-Ω differential STP cables. The deserializer hub is ideal for Power-over-Coax
applications and the receive equalizer automatically adapts to compensate for cable
loss characteristics with no additional programming required, including cable
degradation over time.
Each FPD-Link III interface includes a separate low latency bidirectional control
channel (BCC) that continuously conveys I2C, GPIO, and other control information.
GPIO signals purposed for sensor synchronization and diagnostic features also make
use of the BCC.
The DS90UB954-Q1 is a
versatile dual
deserializer hub
capable of receiving serialized sensor data from one or two independent source s through an FPD-Link
III interface. When paired with a DS90UB953-Q1
serializer, the DS90UB954-Q1 receives
data from imagers, supporting 2MP/60fps and 4MP/30fps cameras as well as
satellite RADAR and other sensors such as ToF and LIDAR. Data is received and
aggregated into a MIPI CSI-2 compliant output for interconnect to a downstream
processor. For
sensors with DS90UB933-Q1 and DS90UB913A-Q1 serializers, the DS90UB954-Q1 receives and
aggregates data from one or two sensors including Full HD 1080p 2MP 60/fps
imager sensors. When configuring the CSI-2 interface for 2-lane operation,
a duplicate MIPI CSI-2 clock lane is available to provide a replicated output.
Replication mode creates two copies of the aggregated video stream
for data logging and parallel processing.
The DS90UB954-Q1 and partner
DS90UB953-Q1 chipset
is AEC-Q100 qualified and designed to receive data across either
50-Ω single-ended coaxial or 100-Ω differential STP cables. The deserializer hub is ideal for Power-over-Coax
applications and the receive equalizer automatically adapts to compensate for cable
loss characteristics with no additional programming required, including cable
degradation over time.
Each FPD-Link III interface includes a separate low latency bidirectional control
channel (BCC) that continuously conveys I2C, GPIO, and other control information.
GPIO signals purposed for sensor synchronization and diagnostic features also make
use of the BCC.