产品详细信息

Number of ADC channels 2 Number of DAC channels (#) 2 Digital audio interface L, R, I2S, DSP Analog inputs 6 Sampling rate (Max) (kHz) 96 Rating Catalog ADC SNR (Typ) (dB) 90 DAC SNR (Typ) (dB) 100
Number of ADC channels 2 Number of DAC channels (#) 2 Digital audio interface L, R, I2S, DSP Analog inputs 6 Sampling rate (Max) (kHz) 96 Rating Catalog ADC SNR (Typ) (dB) 90 DAC SNR (Typ) (dB) 100
VQFN (RHB) 32 25 mm² 5.0 x 5.0 VQFN (RHB) 32
  • Stereo Audio DAC
    • 100 dB A Signal-to-Noise Ratio
    • 16/20/24/32-Bit Data
    • Supports Rates From 8 kHz to 96 kHz
    • 3D/Bass/Treble/EQ/De-Emphasis Effects
  • Stereo Audio ADC
    • 92 dB A Signal-to-Noise Ratio
    • Supports Rates From 8 kHz to 96 kHz
  • Six Audio Input Pins
    • Six Stereo Single-Ended Inputs
  • Six Audio Output Drivers
    • Stereo 8-, 500 mw/Channel Speaker Drive Capability
    • Stereo Fully-Differential or Single-Ended Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo, 48-kHz Playback With 3.3-V Analog Supply
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Record
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-Justified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7 V - 3.6 V
    • Digital Core: 1.65 V - 1.95 V
    • Digital I/O: 1.1 V - 3.6 V
  • Available Packages: 5 × 5 mm, 32-Pin QFN

  • Stereo Audio DAC
    • 100 dB A Signal-to-Noise Ratio
    • 16/20/24/32-Bit Data
    • Supports Rates From 8 kHz to 96 kHz
    • 3D/Bass/Treble/EQ/De-Emphasis Effects
  • Stereo Audio ADC
    • 92 dB A Signal-to-Noise Ratio
    • Supports Rates From 8 kHz to 96 kHz
  • Six Audio Input Pins
    • Six Stereo Single-Ended Inputs
  • Six Audio Output Drivers
    • Stereo 8-, 500 mw/Channel Speaker Drive Capability
    • Stereo Fully-Differential or Single-Ended Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo, 48-kHz Playback With 3.3-V Analog Supply
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Record
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-Justified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7 V - 3.6 V
    • Digital Core: 1.65 V - 1.95 V
    • Digital I/O: 1.1 V - 3.6 V
  • Available Packages: 5 × 5 mm, 32-Pin QFN

The TLV320AIC32 is a low-power stereo-audio codec with a stereo headphone amplifier, as well as multiple inputs and outputs, programmable in single-ended or fully-differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable, battery-powered audio and telephony applications.

The record path of the TLV320AIC32 contains integrated microphone bias, digitally-controlled stereo-microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

The TLV320AIC32 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a cap-less output configuration. In addition, pairs of drivers can be used to drive 8-Ω speakers in a BTL configuration at 500 mW per channel.

The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz rates. The stereo-audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low-level microphone inputs.

The serial control bus supports the I2C protocol, while the serial-audio data bus is programmable for I2S, left/right justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12 MHz, 13 MHz, 16 MHz, 19.2 MHz, and 19.68 MHz system clocks.

The TLV320AIC32 operates from an analog supply of 2.7 V - 3.6 V, a digital core supply of 1.65 V - 1.95 V, and a digital I/O supply of 1.1 V - 3.6 V. The device is available in a 5 × 5 mm, 32-lead QFN package.

The TLV320AIC32 is a low-power stereo-audio codec with a stereo headphone amplifier, as well as multiple inputs and outputs, programmable in single-ended or fully-differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable, battery-powered audio and telephony applications.

The record path of the TLV320AIC32 contains integrated microphone bias, digitally-controlled stereo-microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

The TLV320AIC32 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a cap-less output configuration. In addition, pairs of drivers can be used to drive 8-Ω speakers in a BTL configuration at 500 mW per channel.

The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz rates. The stereo-audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low-level microphone inputs.

The serial control bus supports the I2C protocol, while the serial-audio data bus is programmable for I2S, left/right justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12 MHz, 13 MHz, 16 MHz, 19.2 MHz, and 19.68 MHz system clocks.

The TLV320AIC32 operates from an analog supply of 2.7 V - 3.6 V, a digital core supply of 1.65 V - 1.95 V, and a digital I/O supply of 1.1 V - 3.6 V. The device is available in a 5 × 5 mm, 32-lead QFN package.

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技术文档

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类型 项目标题 下载最新的英语版本 日期
* 数据表 Low Power Stereo Audio Codec for Portable Audio/Telephony 数据表 (Rev. C) 12 Nov 2008
应用手册 Out-of-Band Noise Measurement Issues for Audio Codecs (Rev. A) 31 Dec 2019
应用手册 Audio Serial Interface Configurations for Audio Codecs (Rev. A) 27 Jun 2019
应用手册 Using the MSP430 Launchpad as a Standalone I2C Host for Audio Products (Rev. A) 28 Oct 2013
应用手册 Audio Serial Interface Configurations for Audio Codecs 22 Sep 2010
应用手册 Interfacing an I2S Device to an MSP430 Device (Rev. A) 22 Mar 2010
应用手册 Solving Enumeration Errors in USB Audio DAC and CODEC Designs 30 Oct 2009
应用手册 Configuring I2S to Generate BCLK from Codec Devices and WCLK from McBSP Port 08 Jul 2009
应用手册 TLV320AIC32 WinCE 5.0 Driver 17 Mar 2007
应用手册 Using TLV320AIC3x Digital Audio Data Serial Interface w/TDM Support 05 Jul 2006
EVM 用户指南 TLV320AIC32EVM User's Guide 02 Nov 2005
应用手册 TLV320AIC3x WinCE 5.0 Drivers 27 Sep 2005
应用手册 The Built-In AGC Function in TSC2100/2101 & TLV320AIC26/28/32/33 Devices 13 Sep 2005

设计和开发

如需其他信息或资源,请查看下方列表,点击标题即可进入详情页面。

驱动程序或库

TLV320AIC3XSW-LINUX — 适用于 TLV320AIC3X 的 Linux 驱动程序

Linux 驱动程序支持用于 TLV320AIC3x 系列的低功耗立体声编解码器,通过 I2C 总线和接口与 Linux 便携式设备动态音频电源管理 (DAPM) 系统进行通信。
Linux 主线状态

Linux 主线中提供:是
可通过 git.ti.com 获取:不适用

Linux 源文件

与该器件关联的文件为:

  1. sound/soc/codecs/tlv320aic3x.c
  2. Documentation/devicetree/bindings/sound/tlv320aic3x.txt
  3. sound/soc/codecs/tlv320aic3x.h
  4. include/sound/tlv320aic3x.h
源文件 (...)
仿真模型

TLV320AIC32 IBIS Model TLV320AIC32 IBIS Model

模拟工具

PSPICE-FOR-TI 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
计算工具

COEFFICIENT-CALC 数字双二阶滤波器系数计算器

COEFFICIENT-CALC (TIBQ) 可以计算 TI 音频编解码器中实施的数字滤波器双二阶传输函数的系数。通过选择滤波器类型并在显示传输函数增益和相位图的窗口中移动控制点,可以对数字滤波器的特性进行调节。
封装 引脚数 下载
VQFN (RHB) 32 了解详情

订购和质量

包含信息:
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  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

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