跟踪是一项实时监测软件的技术,可帮助开发人员调试和诊断应用的问题、异常和运行时行为。跟踪也可用于性能基准标记或记录。实时跟踪是解决复杂问题的理想选择。
Lauterbach® 是全球公认的嵌入式系统开发工具提供商,专注于高性能调试和跟踪设计。Lauterbach 提供的 TRACE32® 工具套件集成了硬件和软件,能够为高速跟踪和调试、代码分析及实时跟踪提供全面的支持。工具套件广泛用于各个行业,可优化和验证嵌入式软件。对于 AM26x 器件,Lauterbach 工具有助于无缝调试并支持详细查看系统行为,使开发人员能够高效地解决嵌入式软件开发中的难题。通过使用 Lauterbach 的 TRACE32 工具进行跟踪,开发人员可以详细了解 AM26x 器件上的软件执行。通过记录执行指令、存储器访问和外设交互的序列,跟踪功能有助于识别性能问题、调试复杂场景以及验证软件正确性。对于时序和执行流程非常关键的实时嵌入式系统,此功能至关重要。Lauterbach 的非侵入式跟踪方法与事件时间戳等功能相结合,可在保持系统完整性的同时支持深入分析,最终提高开发效率和系统可靠性。
ARM R5F 内核以及 ARM M4 内核支持 Lauterbach 跟踪。本文档提供了为德州仪器 (TI) 高性能 AM26x 微控制器启用 Lauterbach ETM 跟踪的分步指南。
Code Composer Studio™is a TM ofTI corporate name.
FreeRTOS™is a TM ofAmazon Web Services, Inc.
Lauterbach® and TRACE32®are reg TMs ofLauterbach GmbH.
Windows®is a reg TM ofMicrosoft Corporation.
Linux®is a reg TM ofLinus Torvalds.
Other TMs
若要在 AM26x 器件上运行 MCU_PLUS_SDK 应用,需要安装以下软件和工具:
如果用户需要进一步帮助,请参阅官方文档的下载、安装和设置 SDK 和工具页面。
Lauterbach 软件 - 可从以下位置下载 Trace32 软件包:Lauterbach 支持与培训。对于 Windows®,请将该软件包安装在 C:\T32 中,对于 Linux®,请将该软件包安装在默认位置。
下面列出了启用 Lauterbach® 跟踪所需的硬件:
开关 |
状态 |
SW-5 |
低 |
AM263Px 原理图与 AM263x 不同。因此,对于 AM263Px,某些步骤可能会不同。
开关 |
状态 |
SW-1 |
低 |
SW-14 |
低 |
SW-15 |
低 |
SW-16 |
高 |
现在,用户可以打开 Lauterbach 电源。
调试防火墙由 hsmRtImg 打开。此图形显示在 <mcu_plus_sdk>/source/security/security_common/drivers/hsmclient/soc/<device_name>/hsmRtImg.h 上
如果用户使用的是较早的 MCU_PLUS_SDK 版本(在 v10.01 之前),请将 hsmRtImg.h 替换为更新后的文件:
AM263x - Github
AM263Px - Github
在本应用手册中,用户使用 MCU_PLUS_SDK 示例,在 AM26x MCU 上运行这些示例并获取跟踪。如果用户希望使用不同的应用,请跳过本节。确保已构建 .debug 配置以获得一致的跟踪结果。
#TO CLEAN
gmake -sj -C examples/drivers/gpio/gpio_led_blink/am263px-cc/r5fss0-0_nortos/ti-arm-clang/ PROFILE=debug clean
#TO SCRUB
gmake -sj -C examples/drivers/gpio/gpio_led_blink/am263px-cc/r5fss0-0_nortos/ti-arm-clang/ PROFILE=debug scrub
#TO BUILD
gmake -sj -C examples/drivers/gpio/gpio_led_blink/am263px-cc/r5fss0-0_nortos/ti-arm-clang/ PROFILE=debug all
有关更多详细信息,请参阅使用 makefile 构建 SDK。若要对 AM263x 运行上述命令,请替换器件名称以使用 am263x 而不是 am263px。
CMM 是调试器使用的批处理类型脚本语言。下面的 CMM 脚本处理内核的复位和连接、配置 I2C 时钟、跟踪引脚、IO 扩展器配置、生成片外跟踪结果并将它们显示在窗口中。默认情况下,这适用于 R5F 内核 0,并可修改为针对其他 ARM R5F 和 ARM M4 内核运行。
; -----------------------------------------------------------------------
; Copyright (C) 2023-2024 Texas Instruments Incorporated
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the
; distribution.
;
; Neither the name of Texas Instruments Incorporated nor the names of
; contributors can be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; -----------------------------------------------------------------------
;
; -----------------------------------------------------------------------
; @Title: Simple demo script for Cortex-R5F on TMDSCNCD263
; @Description:
; Prompts the user to load application into RAM and sets up a demo debug
; scenario for the first Cortex-R5F of the SS0 cluster.
; In addition, configures the off-chip trace.
; Prerequisites:
; * Plug TMDSCNCD263 onto TI debug&trace adapter TMDSHSECDOCK-AM263
; * Connect Debug Cable to J13 via adapter LA-3818
; * SW5=OFF to deactivate onboard debugger and enable external JTAG debugger
; @Keywords: ARM, Cortex-R5F
; @Board: TMDSCNCD263
; @Chip: AM2634
; @Copyright: 2023-2024 Texas Instruments Incorporated
; -----------------------------------------------------------------------
&sbl=TRUE() ; When running in QSPI Bootmode
RESet
SYStem.CPU AM2634-SS0
CORE.ASSIGN 1.
IF &sbl==FALSE() ; In case of QSPI bootmode, SBL takes care of the below config
(
; ---------------------------------------------------------------------
; Attach to system bus and make some preparations
SYStem.Mode PREPARE
; Unlock MSS_CTRL register
Data.Set EAHB:0x50D01008 %Long 0x01234567 ; MSS_CTRL_LOCK0_KICK0
Data.Set EAHB:0x50D0100c %Long 0x0fedcba8 ; MSS_CTRL_LOCK0_KICK1
; Eclipse ROM, use RAM in ATCM
Data.Set EAHB:0x50D00080 %Long 0x00000007 ; MSS_CTRL_R5SS0_ROM_ECLIPSE
; Let core run
Data.Set EAHB:0x50D00024 %Long 0x00000000 ; MSS_CTRL_R5SS0_CORE0_HALT
)
; -----------------------------------------------------------------------
; Attach to the cores
SYStem.Mode Attach
Break
IF &sbl==TRUE()
(
Data.Set EAHB:0x50D01008 %Long 0x01234567 ; MSS_CTRL_LOCK0_KICK0
Data.Set EAHB:0x50D0100c %Long 0x0fedcba8 ; MSS_CTRL_LOCK0_KICK1
)
; -----------------------------------------------------------------------
; Disable the MPU and the caches that have been enabled by the firmware (SCTLR)
Data.Set C15:0x1 %Long (Data.Long(C15:0x1)&(~0x1005))
; -----------------------------------------------------------------------
; Load demo program, opens up a file explorer. Navigate and select the application binary you wish
data.LOAD.Elf *
; -----------------------------------------------------------------------
; Configure off-chip trace
IF Analyzer()||CAnalyzer()
(
; Unlock TOP_RCM register
Data.Set EAHB:0x53201008 %Long 0x01234567 ; TOP_RCM_LOCK0_KICK0
Data.Set EAHB:0x5320100C %Long 0x0fedcba8 ; TOP_RCM_LOCK0_KICK1
WAIT 1.MS
IF &sbl==FALSE() ; Incase of OSPI Bootmode, SBL does the PLL clock configuration
(
; Config core PLL
Data.Set EAHB:0x53200410 %Long 0x00010009 ; TOP_RCM_PLL_CORE_M2NDIV
Data.Set EAHB:0x53200414 %Long 0x00000320 ; TOP_RCM_PLL_CORE_MN2DIV
Data.Set EAHB:0x53200408 %Long 0x00000001 ; TOP_RCM_PLL_CORE_TENABLE
Data.Set EAHB:0x53200404 %Long 0x00095001 ; TOP_RCM_PLL_CORE_CLKCTRL
Data.Set EAHB:0x53200430 %Long 0x00000103 ; TOP_RCM_PLL_CORE_HSDIVIDER_CLKOUT1
)
; Select trace clock source and divider
Data.Set EAHB:0x53200C20 %Long 0x00000222 ; TOP_RCM_TRCCLKOUT_CLK_SRC_SEL
Data.Set EAHB:0x53200C24 %Long 0x00000222 ; TOP_RCM_TRCCLKOUT_DIV_VAL
; Unlock IOMUX register and configure IOs
Data.Set EAHB:0x53100298 %Long 0x83e70b13 ; IOMUX_IO_CFG_KICK0
Data.Set EAHB:0x5310029C %Long 0x95a4f1e0 ; IOMUX_IO_CFG_KICK1
WAIT 1.MS
Data.Set EAHB:0x53100064 %Long 0x00000501 ; IOMUX_UART0_RTSN_CFG_REG
Data.Set EAHB:0x53100068 %Long 0x00000501 ; IOMUX_UART0_CTSN_CFG_REG
Data.Set EAHB:0x531000B0 %Long 0x000007F7 ; IOMUX_EPWM0_B_CFG_REG (GPIO44 -> input + pull-high)
Data.Set EAHB:0x531000BC %Long 0x000007F7 ; IOMUX_EPWM2_A_CFG_REG (GPIO47 -> input + pull-high)
Data.Set EAHB:0x53100298 %Long 0x83e70b13 ; IOMUX_IO_CFG_KICK0
Data.Set EAHB:0x5310029C %Long 0x95a4f1e0 ; IOMUX_IO_CFG_KICK1
WAIT 1.MS
Data.Set EAHB:0x531001DC %Long 0x004 ; IOMUX_PR0_PRU1_GPO19_CFG_REG (TRC_CLK)
Data.Set EAHB:0x531001E0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO18_CFG_REG (TRC_CTL)
Data.Set EAHB:0x5310019C %Long 0x204 ; IOMUX_PR0_PRU1_GPO5_CFG_REG (TRC_DATAD0)
Data.Set EAHB:0x531001A0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO9_CFG_REG (TRC_DATAD1)
Data.Set EAHB:0x531001A4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO10_CFG_REG (TRC_DATAD2)
Data.Set EAHB:0x531001A8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO8_CFG_REG (TRC_DATAD3)
IF Analyzer()
(
Data.Set EAHB:0x531001AC %Long 0x204 ; IOMUX_PR0_PRU1_GPO6_CFG_REG (TRC_DATAD4)
Data.Set EAHB:0x531001B0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO4_CFG_REG (TRC_DATAD5)
Data.Set EAHB:0x531001B4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO0_CFG_REG (TRC_DATAD6)
Data.Set EAHB:0x531001B8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO1_CFG_REG (TRC_DATAD7)
Data.Set EAHB:0x531001BC %Long 0x204 ; IOMUX_PR0_PRU1_GPO2_CFG_REG (TRC_DATAD8)
Data.Set EAHB:0x531001C0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO3_CFG_REG (TRC_DATAD9)
Data.Set EAHB:0x531001C4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO16_CFG_REG (TRC_DATAD10)
Data.Set EAHB:0x531001C8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO15_CFG_REG (TRC_DATAD11)
Data.Set EAHB:0x531001CC %Long 0x204 ; IOMUX_PR0_PRU1_GPO11_CFG_REG (TRC_DATAD12)
Data.Set EAHB:0x531001D0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO12_CFG_REG (TRC_DATAD13)
Data.Set EAHB:0x531001D4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO13_CFG_REG (TRC_DATAD14)
Data.Set EAHB:0x531001D8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO14_CFG_REG (TRC_DATAD15)
)
; Use I2C to control the GPIO expander (TCA6416) on the control card to route signals to the docking station
Data.Set EAHB:0x52502024 %Long 0x00004620 ; I2C2_ICMDR
Data.Set EAHB:0x5250200C %Long 0x00000009 ; I2C2_ICCLKL
Data.Set EAHB:0x52502010 %Long 0x00000009 ; I2C2_ICCLKH
Data.Set EAHB:0x5250201C %Long 0x00000020 ; I2C2_ICSAR
Data.Set EAHB:0x52502020 %Long 0x00000006 ; I2C2_ICDXR;
Data.Set EAHB:0x52502024 %Long 0x00006e20 ; I2C2_ICMDR;
Data.Set EAHB:0x52502020 %Long 0x00000003 ; I2C2_ICDXR;
Data.Set EAHB:0x52502024 %Long 0x00006c20 ; I2C2_ICMDR
IF Analyzer()
(
Trace.METHOD Analyzer
TPIU.PortSize 16
)
ELSE
(
Trace.METHOD CAnalyzer
TPIU.PortSize 4
)
TPIU.PortMode Continuous
Trace.TERMination ON
Trace.AutoFocus
)
; -----------------------------------------------------------------------
; Open some windows
WinCLEAR
Mode.Hll
WinPOS 0. 0. 116. 26.
List.auto
WinPOS 120. 0. 100. 8.
Frame.view
WinPOS 120. 14.
Var.Watch
Var.AddWatch %SpotLight ast flags
WinPOS 120. 25.
Trace.List
WinPOS 0. 32.
;Var.DRAW %DEFault sinewave
ENDDO
; -----------------------------------------------------------------------
; Copyright (C) 2023-2024 Texas Instruments Incorporated
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the
; distribution.
;
; Neither the name of Texas Instruments Incorporated nor the names of
; the contributors can be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; -----------------------------------------------------------------------
;
; -----------------------------------------------------------------------
; @Title: Simple demo script for Cortex-R5F on TMDSCNCD263P
; @Description:
; Prompts the user to load application into RAM and sets up a demo debug
; scenario for the first Cortex-R5F of the SS0 cluster.
; In addition, configures the off-chip trace.
; Prerequisites:
; * Plug TMDSCNCD263P onto TI debug&trace adapter TMDSHSECDOCK-AM263
; * Connect Debug Cable to J13 via adapter LA-3818
; * SW1=OFF to deactivate onboard debugger and enable external JTAG debugger
; * SW14=OFF, SW15=OFF, SW16=ON to have signals routed from PRU1 to HSEC
; @Keywords: ARM, Cortex-R5F
; @Board: TMDSCNCD263P
; @Chip: AM263P4
; @Copyright: 2023-2024 Texas Instruments Incorporated
; -----------------------------------------------------------------------
&sbl=TRUE() ; When running in OSPI Bootmode
RESet
SYStem.CPU AM263P4-SS0
CORE.ASSIGN 1.
IF &sbl==FALSE() ; In case of OSPI bootmode, SBL takes care of the below config
(
; ---------------------------------------------------------------------
; Attach to system bus and make some preparations
SYStem.Mode PREPARE
; Unlock MSS_CTRL register
Data.Set EAHB:0x50D01008 %Long 0x01234567 ; MSS_CTRL_LOCK0_KICK0
Data.Set EAHB:0x50D0100c %Long 0x0fedcba8 ; MSS_CTRL_LOCK0_KICK1
; Eclipse ROM, use RAM in ATCM
Data.Set EAHB:0x50D00080 %Long 0x00000007 ; MSS_CTRL_R5SS0_ROM_ECLIPSE
; Let core run
Data.Set EAHB:0x50D00024 %Long 0x00000000 ; MSS_CTRL_R5SS0_CORE0_HALT
)
; -----------------------------------------------------------------------
; Attach to the cores
SYStem.Mode Attach
Break
IF &sbl==TRUE()
(
Data.Set EAHB:0x50D01008 %Long 0x01234567 ; MSS_CTRL_LOCK0_KICK0
Data.Set EAHB:0x50D0100c %Long 0x0fedcba8 ; MSS_CTRL_LOCK0_KICK1
)
; -----------------------------------------------------------------------
; Disable the MPU and the caches that have been enabled by the firmware (SCTLR)
Data.Set C15:0x1 %Long (Data.Long(C15:0x1)&(~0x1005))
; -----------------------------------------------------------------------
; Load demo program, opens up a file explorer. Navigate and select the application binary you wish
data.LOAD.Elf *
; -----------------------------------------------------------------------
; Configure off-chip trace
IF Analyzer()||CAnalyzer()
(
; Unlock TOP_RCM register
Data.Set EAHB:0x53201008 %Long 0x01234567 ; TOP_RCM_LOCK0_KICK0
Data.Set EAHB:0x5320100C %Long 0x0fedcba8 ; TOP_RCM_LOCK0_KICK1
WAIT 1.MS
IF &sbl==FALSE() ; Incase of OSPI Bootmode, SBL does the PLL clock configuration
(
; Config core PLL
Data.Set EAHB:0x53200410 %Long 0x00010009 ; TOP_RCM_PLL_CORE_M2NDIV
Data.Set EAHB:0x53200414 %Long 0x00000320 ; TOP_RCM_PLL_CORE_MN2DIV
Data.Set EAHB:0x53200408 %Long 0x00000001 ; TOP_RCM_PLL_CORE_TENABLE
Data.Set EAHB:0x53200404 %Long 0x00095001 ; TOP_RCM_PLL_CORE_CLKCTRL
Data.Set EAHB:0x53200430 %Long 0x00000103 ; TOP_RCM_PLL_CORE_HSDIVIDER_CLKOUT1
)
; Select trace clock source and divider
Data.Set EAHB:0x53200C20 %Long 0x00000222 ; TOP_RCM_TRCCLKOUT_CLK_SRC_SEL
Data.Set EAHB:0x53200C24 %Long 0x00000222 ; TOP_RCM_TRCCLKOUT_DIV_VAL
; Unlock IOMUX register and configure IOs
Data.Set EAHB:0x53100298 %Long 0x83e70b13 ; IOMUX_IO_CFG_KICK0
Data.Set EAHB:0x5310029C %Long 0x95a4f1e0 ; IOMUX_IO_CFG_KICK1
WAIT 1.MS
Data.Set EAHB:0x53100064 %Long 0x00000501 ; IOMUX_UART0_RTSN_CFG_REG
Data.Set EAHB:0x53100068 %Long 0x00000501 ; IOMUX_UART0_CTSN_CFG_REG
Data.Set EAHB:0x531000B0 %Long 0x000007F7 ; IOMUX_EPWM0_B_CFG_REG (GPIO44 -> input + pull-high)
Data.Set EAHB:0x531000BC %Long 0x000007F7 ; IOMUX_EPWM2_A_CFG_REG (GPIO47 -> input + pull-high)
Data.Set EAHB:0x53100298 %Long 0x83e70b13 ; IOMUX_IO_CFG_KICK0
Data.Set EAHB:0x5310029C %Long 0x95a4f1e0 ; IOMUX_IO_CFG_KICK1
WAIT 1.MS
Data.Set EAHB:0x531001DC %Long 0x004 ; IOMUX_PR0_PRU1_GPO19_CFG_REG (TRC_CLK)
Data.Set EAHB:0x531001E0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO18_CFG_REG (TRC_CTL)
Data.Set EAHB:0x5310019C %Long 0x204 ; IOMUX_PR0_PRU1_GPO5_CFG_REG (TRC_DATAD0)
Data.Set EAHB:0x531001A0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO9_CFG_REG (TRC_DATAD1)
Data.Set EAHB:0x531001A4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO10_CFG_REG (TRC_DATAD2)
Data.Set EAHB:0x531001A8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO8_CFG_REG (TRC_DATAD3)
IF Analyzer()
(
Data.Set EAHB:0x531001AC %Long 0x204 ; IOMUX_PR0_PRU1_GPO6_CFG_REG (TRC_DATAD4)
Data.Set EAHB:0x531001B0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO4_CFG_REG (TRC_DATAD5)
Data.Set EAHB:0x531001B4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO0_CFG_REG (TRC_DATAD6)
Data.Set EAHB:0x531001B8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO1_CFG_REG (TRC_DATAD7)
Data.Set EAHB:0x531001BC %Long 0x204 ; IOMUX_PR0_PRU1_GPO2_CFG_REG (TRC_DATAD8)
Data.Set EAHB:0x531001C0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO3_CFG_REG (TRC_DATAD9)
Data.Set EAHB:0x531001C4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO16_CFG_REG (TRC_DATAD10)
Data.Set EAHB:0x531001C8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO15_CFG_REG (TRC_DATAD11)
Data.Set EAHB:0x531001CC %Long 0x204 ; IOMUX_PR0_PRU1_GPO11_CFG_REG (TRC_DATAD12)
Data.Set EAHB:0x531001D0 %Long 0x204 ; IOMUX_PR0_PRU1_GPO12_CFG_REG (TRC_DATAD13)
Data.Set EAHB:0x531001D4 %Long 0x204 ; IOMUX_PR0_PRU1_GPO13_CFG_REG (TRC_DATAD14)
Data.Set EAHB:0x531001D8 %Long 0x204 ; IOMUX_PR0_PRU1_GPO14_CFG_REG (TRC_DATAD15)
)
; Use I2C to control the GPIO expander (TCA6424) on the control card to route signals to the docking station
Data.Set EAHB:0x52502024 %Long 0x00004620 ; I2C2_ICMDR
Data.Set EAHB:0x5250200C %Long 0x00000009 ; I2C2_ICCLKL
Data.Set EAHB:0x52502010 %Long 0x00000009 ; I2C2_ICCLKH
Data.Set EAHB:0x5250201C %Long 0x00000022 ; I2C2_ICSAR
Data.Set EAHB:0x52502020 %Long 0x0000000C ; I2C2_ICDXR
Data.Set EAHB:0x52502024 %Long 0x00006e20 ; I2C2_ICMDR
Data.Set EAHB:0x52502020 %Long 0x00000006 ; I2C2_ICDXR
Data.Set EAHB:0x52502024 %Long 0x00006c20 ; I2C2_ICMDR
IF Analyzer()
(
Trace.METHOD Analyzer
TPIU.PortSize 16
)
ELSE
(
Trace.METHOD CAnalyzer
TPIU.PortSize 4
)
TPIU.PortMode Continuous
Trace.TERMination ON
Trace.AutoFocus
)
; -----------------------------------------------------------------------
; Open some windows
WinCLEAR
Mode.Hll
WinPOS 0. 0. 116. 26.
List.auto
WinPOS 120. 0. 100. 8.
Frame.view
WinPOS 120. 14.
Var.Watch
Var.AddWatch %SpotLight ast flags
WinPOS 120. 25.
Trace.List
WinPOS 0. 32.
;Var.DRAW %DEFault sinewave
ENDDO
TI 建议用户将 SBL Null 刷写到 AM26x 器件中。
要使用 UniFlash 工具将 SBL Null 映像刷写到器件中,请按照以下步骤操作。