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  • UCC25640x LLC Resonant Controller Features Brief Overview and Bring up Guidelines

    • SLUAAJ7 June   2022 UCC256402 , UCC256403 , UCC256404

       

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  • UCC25640x LLC Resonant Controller Features Brief Overview and Bring up Guidelines
  1.   Abstract
  2.   Trademarks
  3. 1UCC25640x Selection Guide
  4. 2UCC25640x Features Brief Overview
    1. 2.1 High Voltage(HV) Startup
      1. 2.1.1 HV Startup Procedure
      2. 2.1.2 HV Startup with External Bias
      3. 2.1.3 HV Start-up, VCC, X-cap Discharge Internal Block Diagram
      4. 2.1.4 HV Startup External Resistor
    2. 2.2 XCAP Discharge
      1. 2.2.1 IEC Standards
      2. 2.2.2 Detecting AC presence
      3. 2.2.3 Test Current Injection for Zero Crossing Detection
      4. 2.2.4 Typical Waveforms of HV Startup and XCAP Discharge
    3. 2.3 Feedback Chain
      1. 2.3.1 FBreplica Generation
      2. 2.3.2 Vcomp Signal and Threshold Voltages
      3. 2.3.3 FB Pin Voltage Typical Waveform at no Load
    4. 2.4 Hybrid Hysteretic Control and VCR Pin Voltage and Gate Pulse Generation
      1. 2.4.1 Hybrid Hysteretic Control
      2. 2.4.2 VCR Pin Voltage
      3. 2.4.3 VCR Typical Waveform
    5. 2.5 Soft Start
      1. 2.5.1 Soft Start Timing
      2. 2.5.2 Soft Start Initial Voltage Programming
    6. 2.6 Burst Mode
      1. 2.6.1 Burst Patterns
      2. 2.6.2 BMTL/BMTH Ratio Programming
      3. 2.6.3 BMTH Generation
      4. 2.6.4 Interpreting BMTL and BMTH
      5. 2.6.5 Soft On or Off
      6. 2.6.6 Operation when Burst Mode Disabled
      7. 2.6.7 Typical Waveforms
    7. 2.7 Adaptive Dead Time Control
    8. 2.8 Fault Management
      1. 2.8.1 OCP Protection
      2. 2.8.2 OCP Fault Typical Waveforms
      3. 2.8.3 Over Voltage Protection using Bias Winding (BW OVP)
      4. 2.8.4 Restart or Latch
    9. 2.9 ZCS Region Prevention Scheme
      1. 2.9.1 ZCS Effects
      2. 2.9.2 ZCS Detection and Prevention and Disabling
  5. 3UCC25640x Power Up Guidelines and Debugging Notes
    1. 3.1  Power Up Procedure
    2. 3.2  HV Pin
    3. 3.3  VCC Pin
    4. 3.4  BLK Pin
    5. 3.5  FB Pin
    6. 3.6  ISNS Pin
    7. 3.7  VCR Pin
    8. 3.8  BW Pin
    9. 3.9  LL/SS Pin
    10. 3.10 LO Pin
    11. 3.11 RVCC Pin
    12. 3.12 HS, HO, HB Pins
  6. 4References
  7. IMPORTANT NOTICE
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APPLICATION NOTE

UCC25640x LLC Resonant Controller Features Brief Overview and Bring up Guidelines

Abstract

The UCC25640x is the latest family of LLC controllers from Texas Instruments. The UCC25640x has improved features and optimized performance compared to the previous generation devices UCC25630x. This application note briefly discusses each feature of the controller using block diagrams and typical waveforms. Finally, it goes through power up procedure and debugging tips for each pin of the controller.

Trademarks

All trademarks are the property of their respective owners.

1 UCC25640x Selection Guide

Table 1-1 Device Comparison Table
UCC256402 UCC256402A UCC256403 UCC256403A UCC256404 UCC256404A UCC256404B
Key Application Lighting/Industrial Lighting/Industrial TV OLED Screen/Telecom/Industrial TV OLED Screen/Telecom/Industrial TV - WLLC TV - WLLC TV - WLLC
Burst Packet Size 16 16 40 16 40 16 40
Burst Soft On/Off No No Yes No Yes No Yes
HV Startup Yes Yes No No Yes Yes Yes
Auxiliary Supply Required No No Yes Yes No No No
X-Cap Discharge (XCD) No No No No Yes Yes Yes
BLK/DC Start (1) 3 V/340 V 3 V/340 V 3 V/340 V 3 V/340 V 1 V/113 V 1 V/113 V 1 V/113 V
BLK/DC Stop (1) 2.2 V/249 V 2.2 V/249 V 2.2 V/249 V 2.2 V/249 V 0.9 V/102 V 0.9 V/102 V 0.9 V/102 V
BLK/DC OVP (1) NA 4 V/453 V NA NA NA NA NA
BW OVP Mode Restart Restart Restart Latch Restart Latch Restart
Other Fault Mode Restart Restart Restart Restart Restart Restart Restart
PFC Off in Standby Mode No No No No Yes Yes Yes
VCC startup voltage that will initiate startup process 26 V 26 V 10.9 V 10.9 V 26 V 26 V 26 V
(1) Typical startup, shutdown and overvoltage values assume Bulk Divider ratio 113.33:1

The UCC256404B maximum XCD test current is lower (1.3mA) compared to the maximum XCD test currents of the 404 and 404A (1.7mA). This difference helps to reduce stand-by power loss when using the UCC256404B during very-light-load to no-load conditions.

2 UCC25640x Features Brief Overview

2.1 High Voltage(HV) Startup

2.1.1 HV Startup Procedure

Figure 2-1 shows the startup procedure for UCC256402 and UCC256404 devices. Here we can observe that RVCC will be enabled only when VCC reaches 26 V.

GUID-20220512-SS0I-K86V-BQTL-HWLSJRFZLNXC-low.png Figure 2-1 HV Startup for 402 and 404 Devices

2.1.2 HV Startup with External Bias

As mentioned in Table 1-1, 403 devices does not have an HV startup. Auxiliary supply is needed to startup these devices. Figure 2-2 shows the startup procedure for UCC256403 devices with auxiliary supply.

GUID-20220512-SS0I-JFGQ-VSJS-CCVX4HWDQSXL-low.png Figure 2-2 HV Startup with External Bias for 403 Devices

2.1.3 HV Start-up, VCC, X-cap Discharge Internal Block Diagram

  • Figure 2-3 shows the internal architecture of the HV, VCC, X-cap discharge block.
  • The switch S1 shown in Figure 2-3 controls high voltage startup for the device. Once the VCC pin exceeds the VccStartSelf (402 and 404 devices), this switch will be turned off which means HV startup is finished.
GUID-20220512-SS0I-VKHH-WL5M-NX3M90BNHDHL-low.png Figure 2-3 HV, VCC, X-cap Discharge Internal Block Architecture

2.1.4 HV Startup External Resistor

The typical recommended resistor value for RHV shown in Figure 2-4 is 5k Ohm.

GUID-20220512-SS0I-1NXW-CTQG-1KVGFP1PB8WP-low.pngFigure 2-4 HV Startup Block Diagram

2.2 XCAP Discharge

2.2.1 IEC Standards

GUID-20220523-SS0I-TCKX-G1VK-QGZ7S7RNMTHL-low.png Figure 2-5 Voltage at HV Pin for Zero Crossing Detection
  • IEC60950 and IEC60065: 1s after AC disconnect, the remaining voltage on x-capacitor should be less than 37% of the initial voltage.
  • IEC62368: 2s after AC disconnect, the remaining voltage on x-capacitor should be less than 60 V.

2.2.2 Detecting AC presence

  • HV pin is connected to Line and Neutral through two rectifier diodes as shown in Figure 2-4; This pin’s voltage is used to detect if AC is present.
  • Under ideal conditions when AC is connected, the HV pin should detect the zero crossing where the voltage between Line and Neutral reaches 0 V twice per cycle. However, due to the parasitic capacitance of the diode bridge, the voltage at HV will not reach zero. To overcome this, current is sinked from HV to GND.
GUID-6F4A5302-8F7C-4958-80ED-2920D9F9402C-low.png Figure 2-6 X-cap discharge internal block diagram
  • The switch S2 highlighted in Figure 2-6 controls the Ixcap test current to determine if AC is still connected. The logic is looking for the HV pin to be pulled below 9V. Note this test current goes to gnd.

2.2.3 Test Current Injection for Zero Crossing Detection

GUID-4E0B17EA-FAD0-4708-AA04-9578641444AF-low.gif Figure 2-7 Xcap Discharge
  • Test current I1 is applied to check if HV pin voltage is <9 V threshold.
  • When HV pin voltage falls below 9 V, test current is turned off and controller waits 700 ms before applying I1 again.
  • I1 test current is on for maximum of 12 ms. If HV pin does not satisfy <9 V requirement, test current is increased to I2, then I3 and finally, I4.
  • I4 test current maximum on time is 48 ms.
  • If zero crossing is not detected during the test current period, a discharge current of 11.5 mA (typical value) is applied for 350 ms from HV to GND as shown in Figure 2-7.

2.2.4 Typical Waveforms of HV Startup and XCAP Discharge

GUID-520DDE40-C1B7-493B-A2D7-D689CE223605-low.pngFigure 2-8 Test Condition: AC Plugged in, BLK UVLO; Ch1 – LO, Ch2 – VCC, Ch3 – RVCC, Ch4 – HV
GUID-F773183A-3855-4487-971C-9F8BAEFBE035-low.pngFigure 2-9 Zoomed In: Test Condition: AC Plugged in, BLK UVLO; Ch1 – LO, Ch2 – VCC, Ch3 – RVCC, Ch4 – HV

In Figure 2-8 and Figure 2-9, we can observe that whenever test current being injected (for every 700 ms) HV pin voltage is being pulled down. Also, when VCC is reduced to VCCRestartJFET threshold, VCC charging is initiated.

GUID-89AD7C07-3856-4195-B8B5-A3C7286FFB16-low.png Figure 2-10 Waveform Capture of AC Input Removal and X-cap Discharge

2.3 Feedback Chain

As UCC25640x is a primary side LLC controller, the output voltage/current is regulated by a voltage/current regulator circuit located on the secondary side of the isolation barrier. The demand signal from the secondary side regulator circuit is transferred across the isolation barrier via an opto-coupler (U1) as shown in Figure 2-11.

GUID-20220525-SS0I-WKT8-88FD-NJPGXQJRJM3Z-low.png Figure 2-11 Feedback Chain Block Diagram

2.3.1 FBreplica Generation

GUID-20220525-SS0I-BLHD-BRSG-RR8PP5PCL9K3-low.png Figure 2-12 FBreplica Generation
  • FB pin is supplied with an IFB current source
  • The optocoupler collector voltage maintained at approximate constant voltage (~5.6 V) when FB sourcing current is less than IFB. Due to this, no extra pole introduced due to the optocoupler parasitic capacitor
  • The FB clamp circuit is to provide extra 82uA current to the FB pin when needed to prevent FB voltage drop and to maintain good transient performance
  • The Optocoupler current is reflected as the FBreplica in the IC for control purpose
  • Voltage at the RFB is given by FBreplica = (IFB-Ioptocoupler) *RFB where RFB typical value is 100 kohm and IFB typical values are 82 uA (for 402, 404 devices) and 164 uA (403, 403A devices).
  • If the current through optocoupler is zero during the heavy output load, FB pin voltage will be clamped to internal whereas FBreplica is clamped to 6 V.

 

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