ZHCSIV8B January 2010 – October 2018 TLV320DAC3101
PRODUCTION DATA.
After the device has been configured (following a RESET) and the circuitry has been powered up, the audio output stage can be powered up and powered down by register control.
These functions soft-start automatically. By using these register controls, it is possible to control these four output-stage configuratios independently.
See Table 6-25 for register control of audio output stage power configurations.
AUDIO OUTPUT PINS | DESIRED FUNCTION | PAGE 1 / REGISTER, BIT VALUES |
---|---|---|
HPL | Power down HPL driver | Page 1 / register 31, bit D7 = 0 |
Power up HPL driver | Page 1 / register 31, bit D7 = 1 | |
HPR | Power down HPR driver | Page 1 / register 31, bit D6 = 0 |
Power up HPR driver | Page 1 / register 31, bit D6 = 1 | |
SPLP / SPLM | Power down left class-D drivers | Page 1 / register 32, bit D7 = 0 |
Power up left class-D drivers | Page 1 / register 32, bit D7 = 1 | |
SPRP / SPRM | Power down right class-D drivers | Page 1 / register 32, bit D6 = 0 |
Power up right class-D drivers | Page 1 / register 32, bit D6 = 1 |