ZHCSIV8B January 2010 – October 2018 TLV320DAC3101
PRODUCTION DATA.
Using Figure 7-1 as a guide, integrate the hardware into the system.
Following the recommended component placement, schematic layout and routing given in Section 9, integrate the device and its supporting components into the system PCB file.
Determining sample rate and master clock frequency is required since powering up the device as all internal timing is derived from the master clock. Refer to Section 6.3.11 to get more information of how to configure correctly the required clocks for the device.
As the TLV320DAC3101 is designed for low-power applications, when powered up, the device has several features powered down. A correct routing of the TLV320DAC3101 signals is achieved by a correct setting of the device registers, powering up the required stages of the device and configuring the internal switches to follow a desired route.