SPRZ452I july   2018  – may 2023 AM6526 , AM6528 , AM6546 , AM6548

 

  1. 1Usage Notes and Advisories Matrices
  2. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development-Support Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  3. 3Silicon Revision 2.1, 2.0, 1.0 Usage Notes and Advisories
    1. 3.1 Silicon Revision 2.1, 2.0, 1.0 Usage Notes
      1. 3.1.1 Fail-Safe IO's: Latch-up Risk on Fail-Safe IOs
      2. 3.1.2 ADC: High Input Leakage Current May Impact ADC Accuracy
      3. 3.1.3 INTRTR: Spurious Interrupts Generated when Programming Certain Interrupt Routers
      4.      i2351
    2. 3.2 Silicon Revision 2.1, 2.0, 1.0 Advisories
      1. 3.2.1 Silicon Revision 2.1, 2.0, 1.0 Advisory List
      2.      i939
      3.      i2000
      4.      i2004
      5.      i2006
      6.      i2009
      7.      i2013
      8.      i2015
      9.      i2018
      10.      i2019
      11.      i2020
      12.      i2021
      13.      i2022
      14.      i2023
      15.      i2024
      16.      i2025
      17.      i2026
      18.      i2027
      19.      i2028
      20.      i2030
      21.      i2032
      22.      i2037
      23.      i2038
      24.      i2039
      25.      i2046
      26.      i2053
      27.      i2054
      28.      i2055
      29.      i2068
      30.      i2069
      31.      i2073
      32.      i2075
      33.      i2076
      34.      i2083
      35.      i2084
      36.      i2095
      37.      i2096
      38.      i2097
      39.      i2098
      40.      i2099
      41.      i2101
      42.      i2103
      43.      i2104
      44.      i2106
      45.      i2115
      46.      i2116
      47.      i2118
      48.      i2119
      49.      i2129
      50.      i2132
      51.      i2137
      52.      i2138
      53.      i2139
      54.      i2141
      55.      i2143
      56.      i2146
      57.      i2148
      58.      i2149
      59.      i2161
      60.      i2162
      61.      i2164
      62.      i2165
      63.      i2177
      64.      i2184
      65.      i2185
      66.      i2187
      67.      i2189
      68.      i2193
      69.      i2196
      70.      i2198
      71.      i2204
      72.      i2207
      73.      i2231
      74.      i2234
      75.      i2245
      76.      i2307
      77.      i2014
      78.      i2145
      79.      i2163
      80.      i2173
      81.      i2249
      82.      i2278
      83.      i2279
      84.      i2307
      85.      i2310
      86.      i2311
      87.      i2320
      88.      i2328
      89.      i2329
      90.      i2040
      91.      i2041
      92.      i2043
      93. 3.2.2 i2151
      94.      i2262
      95.      i2264
      96.      i2265
      97.      i2266
      98.      i2268
      99.      i2312
      100.      i2371
        1.       Trademarks
          1.        Revision History

i939

MCAN: Message Transmitted with Wrong Arbitration and Control Fields (Early Start of Frame)

Details

The erratum is limited to the case when MCAN is in state "Receiver" (MCAN_PSR[4:3] ACT = "10") with no pending transmission (no MCAN_TXBRP bit set) and a new transmission is requested before the 3rd bit of Intermission is reached and this 3rd bit of intermission is seen dominant. This issue occurs only with disturbed CAN bus.

Under the following conditions, a message with wrong ID, format, and DLC is transmitted:

  • MCAN is in state "Receiver" (MCAN_PSR[4:3] ACT = "10"), no pending transmission
  • A new transmission is requested before the 3rd bit of Intermission is reached
  • The CAN bus is sampled dominant at the third bit of Intermission which is treated as SoF (see ISO11898-1:2015 Section 10.4.2.2).

Under the conditions listed above, it may happen, that:

  • The shift register is not loaded with ID, format, and DLC of the requested message
  • The MCAN will start arbitration with wrong ID, format, and DLC on the next bit
  • In case the ID wins arbitration, a CAN message with valid CRC is transmitted
  • In case this message is acknowledged, the ID stored in the Tx Event FIFO is the ID of the requested Tx message and not the ID of the message transmitted on the CAN bus, no error is detected by the transmitting MCAN
  • If the message loses arbitration or is disturbed by an error, it is retransmitted with correct arbitration and control fields.

Workaround

Workaround 1:

Request a new transmission only if another transmission is already pending or when the MCAN is not in state "Receiver" (when MCAN_PSR[4:3] ACT !=‚ "10").

To avoid activating the transmission request in the critical time window between the sample points of the 2nd and 3rd bit of Intermission, following can be done:

  • Evaluate the Rx Interrupt flags MCAN_IR[19] DRX, MCAN_IR[0] RF0N, MCAN_IR[4] RF1N which are set at the last bit of EoF when a received and accepted message gets valid. Prevent the transmission of any message within 3 bit times after detecting the Rx interrupt flags.

Workaround 2:

A checksum covering arbitration and control fields can be added to the data field of the message to be transmitted, to detect frames transmitted with wrong arbitration and control fields.

Workaround 3:

Set MCAN_CCCR[0] INIT bit, add transmission request for the message and then clear MCAN_CCCR[0] INIT bit. This needs to be done for each message to be transmitted.

Workaround 4:

Keep the number of pending transmissions always at ">0" by frequently requesting a message so that the condition "no pending transmission" is never met. The frequently requested message may be given a low priority, losing arbitration to all other messages.

In case, where all the nodes present on the CAN bus have this workaround implemented, at least two nodes shall have this frequently sent low priority message with different priorities/identifiers. Rest of the nodes can have one of these priorities/identifiers (same) as the priority of this frequently sent message.

Comparison within available Workarounds is shown in Table 3-1.

Table 3-1 Comparison within available Workarounds
Workaround (WA) # Advantages Disadvantages
1

• Easy to implement.

• Fix is only limited to a local node with the erratum.

• Only viable in interrupt context.

• Effectiveness is vastly dependent on interrupt service latency.

• Application becomes complicated.

2 • Simple and easy to implement. • All nodes on the bus must implement this WA. Restricting use of device for end points and all the existing nodes needs to be updated to support this WA.
3 • Simple and easy to implement.

• Node will miss any messages received during this sequence.

• System (including existing nodes) needs to be updated for detecting the dropped/missed message.

4

• DMA can be used to send the frequently sent low priority message to reduce CPU load.

• Most effective and viable amongst available workarounds.

• Fix is only limited to a local node with the erratum.

• 100% CAN Bus utilization at all times.

• Increased CPU load in case CPU is used to send the message.