SPRZ171T December   2004  – September 2020 SM320F2801-EP , SM320F2808-EP , TMS320F2801 , TMS320F2801-Q1 , TMS320F28015 , TMS320F28016 , TMS320F28016-Q1 , TMS320F2802 , TMS320F2802-Q1 , TMS320F2806 , TMS320F2806-Q1 , TMS320F2808 , TMS320F2808-Q1 , TMS320F2809 , TMS320F2809-Q1

 

  1. 1Introduction
  2. 2Device and Development Tool Support Nomenclature
  3. 3Device Markings
  4. 4Silicon Change Overview
  5. 5Usage Notes and Known Design Exceptions to Functional Specifications
    1. 5.1 Usage Notes
      1. 5.1.1 PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask Clear Usage Note
    2. 5.2 Known Design Exceptions to Functional Specifications
      1.      Advisory
      2.      Advisory
      3.      Advisory
      4.      Advisory
      5.      Advisory
      6.      Advisory
      7.      Advisory
      8.      Advisory
      9.      Advisory
      10.      Advisory
      11.      Advisory
      12.      Advisory
      13.      Advisory
      14.      Advisory
      15.      Advisory
      16.      Advisory
      17.      Advisory
      18.      Advisory
      19.      Advisory
      20.      Advisory
      21.      Advisory
      22.      Advisory
  6. 6Documentation Support
  7. 7Trademarks
  8. 8Revision History

Advisory

ADC: Initial Conversion Latency

Revision(s) Affected

0 on F2808, F2806, and F2801 silicon

Details

When the ADC conversions are initiated by any source of trigger, the first two samples may not be correct conversion results.

Workaround(s)

  1. If the ADC is set to convert at 1 mega sample per second (MSPS) or higher, discard the first two samples

    For instance, if the sequencer is set to sample channel A0/A1/A2 in that order, then load the sequencer with A0/A0/A0/A1/A2 and only use the last three conversions.

  2. If the ADC is set at a conversion rates below 1 MSPS, the conversion latency will give the ADC appropriate time to settle and the first conversion should be valid. Each application should validate this as acceptable in their application.

    This has been fixed in the B revision of the silicon.