SPRUIW9C October 2021 – March 2024 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
The master clock period (Tmst) is a multiple of the period of the I2C Module Clock (Tmod):
where d depends on the divide-down value IPSC, as shown in Table 26-1. IPSC is described in the I2CPSC register.
IPSC | d |
---|---|
0 | 7 |
1 | 6 |
Greater than 1 | 5 |