SPRUIN7C March 2020 – March 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
Write accesses from the DMA can be protected by setting the DMAWRPROTx bit of a specific register to ‘1.’ If a write access is done by the DMA to protected memory, a write protection violation occurs.
If a write access is made to GSx memory by a non-master DMA, the write access is called a non-master write protection violation. If a write access is made to a dedicated or shared memory by a master DMA, and DMAWRPROTx is set to 1 for that memory, the write access is called a master DMA write protection violation.
A flag gets set in the DMA access violation flag register, and the memory address where the violation happened gets latched in the DMA fetch access violation address register. These are dedicated registers for each subsystem.
Note 1: | All access protections are ignored during debug accesses. Write access to a protected memory goes through when the write access is done using the debugger, irrespective of the write protection configuration for that memory. |
Note 2: | Access protection is not implemented for M0 and M1 memories. |