SPRACP6 December   2019 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

  1.   How to Maximize GPIO Usage in C2000 Devices
    1.     Trademarks
    2. 1 Introduction
    3. 2 Zero Pin Boot Mode Option
      1. 2.1 Weak Pull-Up Method
      2. 2.2 Zero Pin Boot Mode Method
    4. 3 cJTAG Option
    5. 4 Zero Pin Internal Oscillator Option
    6. 5 CMPSS to Save Extra GPIO for Fast Protection
    7. 6 AIO Option
    8. 7 Using the GPDACs as General Purpose Outputs
    9. 8 Optional 1.2-V Internal DCDC
    10. 9 References

2 Zero Pin Boot Mode Option

On every reset, the device executes a boot sequence in ROM depending on the boot mode configuration. By default, the boot ROM uses two boot control GPIO pins to determine the boot mode configuration. Table 1 shows the default boot mode options of the F28004x device.

Table 1. F28004x Device Default Boot Modes

Boot Mode GPIO24 (default boot mode select pin 1) GPIO32 (default boot mode select pin 0)
Parallel IO 0 0
SCI/Wait boot 0 1
CAN 1 0
Flash 1 1

There are two ways the boot control GPIO pins can be re-purposed for use in an application:

  • Utilize weak pull-ups on these GPIOs so they can be overdriven by the application
  • Configure an alternate boot mode that does not require the boot control GPIO pins