3 cJTAG Option

Contrary to previous devices, the F28004x device supports cJTAG connection as shown in Figure 1. JTAG port has four dedicated pins: TMS, TDI, TDO, and TCK, while cJTAG port is a compact JTAG interface requiring only two pins (TMS and TCK). Thus, the traditional GPIO35 (TDI) and GPIO37 (TDO) pins can be muxed as other peripheral functions.

Compared to JTAG, cJTAG provides lower performance because it uses only two pins: TMS and TCK. Basically, TDI, TDO and TMS functionality is implemented on single pin, TMS. The maximum supported clock frequency on TCK is 15 MHz for JTAG, and for cJTAG, it decreases to 10 MHz. Note that in order to use cJTAG, a supported debug probe is required, such as XDS100V3, XDS110, XDS200, and so forth.

A. TDI and TDO connections are not required for cJTAG option and these pins can be used as GPIOs instead.

Figure 1. Connecting to the 14-Pin JTAG Header