SPMU411 November   2025 TPS65215-Q1

 

  1.   1
  2.   ABSTRACT
  3.   Trademarks
  4. 1Introduction
  5. 2EEPROM Device Settings
    1. 2.1  Device ID
    2. 2.2  Enable Settings
    3. 2.3  Regulator Voltage Settings
    4. 2.4  Power Sequence Settings
      1. 2.4.1 Power Sequence Settings - Slot assignments
      2. 2.4.2 Power Sequence Settings - Slot Durations
      3. 2.4.3 TPS6521570-Q1 Power Sequence and Example Block Diagram
    5. 2.5  EN / PB / VSENSE Settings
    6. 2.6  Multi-Function Pin Settings
    7. 2.7  Over-Current Deglitch
    8. 2.8  Mask Settings
    9. 2.9  Discharge Check
    10. 2.10 Multi PMIC Config
  6. 3Revision History

2.6 Multi-Function Pin Settings

The TPS6521570-Q1 PMIC has three multi-function pins that can be configured to set the voltage on a specific power rail or to change the frequency mode or to trigger a warm or cold reset. This section describes how each of the multi-function pins were configured.

Table 2-11 Multi-Function Pin Settings
Pin NameSettingRegister NameField NameValueDescription
VSEL_SD / VSEL_DDRFunction selectionMFP_1_CONFIGVSEL_DDR_SD0x0VSEL pin configured as DDR to set the voltage on Buck3
Rail MFP_1_CONFIGVSEL_RAIL0x0LDO1
pin polarity

(only applicable if VSEL_DDR_SD=0x1)

MFP_1_CONFIGVSEL_SD_POLARITY0x0 LOW - 1.8V / HIGH - LDOx_VOUT register setting
MODE / STBYfunction selectionMFP_2_CONFIGMODE_STBY_CONFIG0x0MODE
pin polarityMFP_1_CONFIGMODE_STBY_POLARITY0x0 [if configured as MODE] LOW - auto-PFM / HIGH - forced PWM. [if configured as a STBY] LOW - STBY state / HIGH - ACTIVE state.
MODE / RESETfunction selectionMFP_2_CONFIGMODE_RESET_CONFIG0x1RESET
reset selectionMFP_2_CONFIGWARM_COLD_RESET_CONFIG 0x1WARM RESET
pin polarityMFP_1_CONFIGMODE_RESET_POLARITY0x0[if configured as MODE] LOW - auto-PFM / HIGH - forced PWM. [if configured as RESET] LOW - reset / HIGH - normal operation.

Note:

  • If LDO1 or LDO2 is configured as bypass and the VSEL pin is not configured as SD (VSEL_DDR_SD=0x0), the voltage change on the selected VSEL_RAIL can be changed by I2C (register field: VSEL_SD_I2C_CTRL)

    Table 2-12 Default register setting for VSEL_SD_I2C_CTRL
    Register NameField NameValueDescription
    MFP_1_CONFIGVSEL_SD_I2C_CTRL0x1LDOx_VOUT register setting

  • If Bucks are configured for quasi-fixed frequency (BUCK_FF_ENABLE=0x0), and none of the multi-function pins are configured as MODE, switching between auto-PFM and forced-PWM can be changed by I2C (register field: MODE_I2C_CTRL).

    Table 2-13 Default register setting for MODE_I2C_CTRL
    Register NameField NameValueDescription
    MFP_1_CONFIGMODE_I2C_CTRL0x0Auto PFM