SNLU273 December   2020 DS160PR810

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Description
    1. 2.1  DS160PR810 4-Level I/O Control Inputs
    2. 2.2  DS160PR810 Modes of Operation
    3. 2.3  DS160PR810 SMBus or I2C Register Control Interface
    4. 2.4  DS160PR810 Equalization Control
    5. 2.5  DS160PR810 RX Detect State Machine
    6. 2.6  DS160PR810 DC Gain Control
    7. 2.7  DS160PR810 EVM Global Controls
    8. 2.8  DS160PR810EVM Downstream Devices Control
    9. 2.9  DS160PR810EVM Upstream Devices Control
    10. 2.10 Quick-Start Guide (Pin Mode)
    11. 2.11 Quick-Start Guide (SMBus Slave Mode)
  4. 3Test Setup and Results
  5. 4Schematics
  6. 5Board Layout
  7. 6Bill of Materials
  8. 7References

DS160PR810 SMBus or I2C Register Control Interface

The DS160PR810 internal registers can be accessed through standard SMBus protocol. The DS160PR810 features two banks of channels, Bank 0 (Channels 0–3) and Bank 1 (Channels 4–7), each featuring a separate register set and requiring a unique SMBus slave address. The SMBus slave address pairs (one for each channel bank) are determined at power up based on the configuration of the EQ0_0/ADDR1 and EQ1_0/ADDR0 pins. The pin state is read on power up, after the internal power-on reset signal is deasserted.

There are 16 unique SMBus slave address pairs (one address for each channel bank) that can be assigned to the device by placing external resistor straps on the EQ0_0/ADDR1 and EQ1_0/ADDR0 pins as shown in Table 2-3. When multiple DS160PR810 devices are on the same SMBus interface bus, each channel bank of each device must be configured with a unique SMBus slave address pair.

Table 2-3 DS160PR810 SMBus Address Map

ADDR1 Pin Level

ADDR0 Pin LevelBank 0: Channels 0-3:
7-Bit Address [HEX]
Bank 1 Channels 4-7:
7-Bit Address [HEX]
L0L00x180x19
L0L10x1A0x1B
L0L20x1C0x1D
L0L30x1E0x1F
L1L00x200x21
L1L10x220x23
L1L20x240x25
L1L30x260x27

L2

L0

0x28

0x29

L2

L1

0x2A

0x2B

L2

L2

0x2C

0x2D

L2

L3

0x2E

0x2F

L3

L0

0x30

0x31

L3

L1

0x32

0x33

L3

L2

0x34

0x35

L3

L3

0x36

0x37