SNLU273 December   2020 DS160PR810

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Description
    1. 2.1  DS160PR810 4-Level I/O Control Inputs
    2. 2.2  DS160PR810 Modes of Operation
    3. 2.3  DS160PR810 SMBus or I2C Register Control Interface
    4. 2.4  DS160PR810 Equalization Control
    5. 2.5  DS160PR810 RX Detect State Machine
    6. 2.6  DS160PR810 DC Gain Control
    7. 2.7  DS160PR810 EVM Global Controls
    8. 2.8  DS160PR810EVM Downstream Devices Control
    9. 2.9  DS160PR810EVM Upstream Devices Control
    10. 2.10 Quick-Start Guide (Pin Mode)
    11. 2.11 Quick-Start Guide (SMBus Slave Mode)
  4. 3Test Setup and Results
  5. 4Schematics
  6. 5Board Layout
  7. 6Bill of Materials
  8. 7References

DS160PR810 Equalization Control

Each channel of the DS160PR810 features a continuous-time linear equalizer (CTLE) that applies high-frequency boost and low-frequency attenuation to help equalize the frequency-dependent insertion loss effects of the passive channel. Table 2-4 shows available equalization boost through EQ control pins (EQ1_0 and EQ0_0 for channels 0–3 and EQ1_1 and EQ0_1 for channels 4–7) when in Pin Control mode (MODE = L0).

Table 2-4 Equalization Control Settings
EQ INDEXEQ1 PIN LEVELEQ0 PIN LEVELCTLE BOOST AT 4 GHz (dB)CTLE BOOST AT 8 GHz (dB)
0L0L0–0.25–0.5
1L0L12.04.0
2L0L22.55.0
3L0L33.06.0
4L1L04.07.0
5L1L14.57.5
6L1L25.08.0
7L1L36.09.5
8L2L07.010
9L2L18.011
10L2L28.512.5
11L2L39.013
12L3L09.514.5
13L3L110.015
14L3L210.516.0
15L3L31218

The equalization gain of each channel of each device can also be set by writing to SMBus, I2C registers in I2C Mode. Refer to the DS160PR810 Programming Guide (SNLU268) for details.