SNLA411 October   2022 DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TC813R-Q1 , DP83TC813S-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1 Introduction
    1. 1.1 System Block Diagram
    2. 1.2 Terminology
  4. 2 TC10 Pin Descriptions
  5. 3 Primary Functions of the PHY
    1. 3.1 Transition from Sleep to Wake-up mode
      1. 3.1.1 Local Wake Detection
      2. 3.1.2 WUP Transmission and Reception
    2. 3.2 Wake Forwarding
    3. 3.3 Transition to Sleep - Sleep Negotiation
      1. 3.3.1 Sleep Ack
      2. 3.3.2 Sleep Request
      3. 3.3.3 Sleep Silent
      4. 3.3.4 Sleep Fail
      5. 3.3.5 Sleep
      6. 3.3.6 Normal State
      7. 3.3.7 Other Transitions
        1. 3.3.7.1 Forced Sleep
        2. 3.3.7.2 Activity during Sleep Negotiation
        3. 3.3.7.3 Link Down during Sleep Negotiation
        4. 3.3.7.4 Sleep Silent to Standby
  6. 4 Relevant Registers
  7. 5 Power Supply Recommendation
    1. 5.1 Core Supply Network Recommendation
    2. 5.2 Networks with Shared Core Supplies
  8. 6 Sequence of Events and Timing
    1. 6.1 Local Wake Timing
    2. 6.2 Remote Wake Timing
    3. 6.3 Successful Sleep Negotiation Timing
    4. 6.4 Sleep Abort Timing
    5. 6.5 WUR Timing
  9. 7 Ethernet Network Wake-up
  10. 8 Configuration for non-TC10 Applications
  11. 9 Additional Features
    1. 9.1 WUR Initiation Through WAKE Pin
    2. 9.2 Programmable Wake-Forward Pulse Width
  12. 10Conclusion

6.3 Successful Sleep Negotiation Timing

Figure 6-3 Timing - Successful Sleep Negotiation
Table 6-3 Timing - Successful Sleep Negotiation
Parameter Description Units Min Typ Max
T3.1 Sleep Request on DUT to LPS Received Interrupt on LP delay (DP83TC812/3 LP) μs 10
T3.2 Sleep Request on DUT to DUT Sleep delay ms 10
T3.3 Sleep Request on DUT to LP Sleep delay ms 10