SNAU271 October   2021 LMK1D1212

 

  1.   Trademarks
  2. 1 Features
  3. 2 General Description
  4. 3 Signal Path and Control Circuitry
  5. 4 Getting Started
  6. 5 Power Supply Connection
  7. 6 Input Clock Selection
    1. 6.1 Differential Input
    2. 6.2 Single-Ended Input
  8. 7 Output Clock
  9. 8 EVM Board Schematic
  10. 9 REACH Compliance
  11. 10Bill of Materials

2 General Description

The LMK1D1212 is a high-performance, low-additive jitter clock buffer. This has two universal input buffers that support differential clock inputs which can be selected by the control pin. The device also features on-chip bias generators that can provide LVDS common-mode voltage for AC-coupled differential clock inputs.

By default, the evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1D1212 but can be replaced by the LMK1D1208P, the LMK1D2106, and, after populating the missing I2C components, the LMK1D1212I. The I2C-capable LMK1D1212I can be used through Micro-USB and by interfacing with the TICS Pro software.

This fully assembled and factory-tested evaluation board allows complete validation of device functionalities. For optimum performance, the board is equipped with SMA connectors and well-controlled, 50-Ω impedance microstrip transmission lines.