SNAA360 June   2022 ADC32RF54 , ADC32RF55 , AFE7950 , LMX1204

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Cascaded LMX1204 Design
  4. 2Results
    1. 2.1 Single Device Performance
    2. 2.2 Cascaded Device Performance
    3. 2.3 Detailed Results
      1. 2.3.1 1 GHz Performance
      2. 2.3.2 3 GHz Performance
      3. 2.3.3 6 GHz Performance
      4. 2.3.4 10 GHz Performance
      5. 2.3.5 12.8 GHz Performance
    4. 2.4 Cascaded LMX1204 Performance With ADC32RF54
    5. 2.5 Cascaded LMX1204 Performance With AFE7950
  5. 3Summary
  6. 4References

2.3.2 3 GHz Performance

Figure 2-4 shows the phase noise at close-in offset frequencies of a 3 GHz carrier for the SMA100B and cascaded LMX1204 design is slightly better than the LMX1204EVM, once again indicating board layout improvement on the cascaded LMX1204 design. The performance of all three sources is near identical out to an offset frequency of 800 kHz, which is slightly further out than the 1-GHz carrier frequency case. Both LMX1204 devices match the SMA100B to an increased offset frequency as the SMA100B noise floor is elevated.

Figure 2-4 Phase Noise Comparison - 3 GHz

The cascaded LMX1204 design noise floor shows an average increase of 1.4 dB compared to the single LMX1204 response at 3 GHz. Use this increase as an estimate of the noise floor degradation as additional LMX1204 devices are cascaded. This elevation amount is important as it can be used to quickly estimate the added phase noise for a system of N number of devices operating near 3 GHz as each additional stage should elevate the noise floor by only 1.4 dB. Refer to Section 2.4 for a comparison in data converter performance in a 2.6 GSPS ADC application between the SMA100B and LMX1204 clock distribution board.