SLVUCG9 October   2022 TPS36-Q1

 

  1.   Abstract
  2. 1Trademarks
  3. 2Introduction
    1. 2.1 Related Documentation
  4. 3Schematic, Bill of Materials, and Layout
    1. 3.1 TPS36Q1EVM Schematic
    2. 3.2 TPS36Q1EVM Bill of Materials
    3. 3.3 Layout and Component Placement
  5. 4EVM Connectors
    1. 4.1 EVM Jumpers
    2. 4.2 EVM Test Points
  6. 5EVM Setup and Operation
    1. 5.1 Input Power (VDD)
    2. 5.2 RESET
    3. 5.3 Manual Reset (MR)
    4. 5.4 SET0 and SET1
    5. 5.5 Watchdog Enable (WD_EN)
    6. 5.6 Watchdog Input (WDI)
    7. 5.7 Watchdog Output (WDO)
    8. 5.8 CRST
    9. 5.9 CWD
  7. 6EVM Performance Results
  8. 7Revision History

5.3 Manual Reset (MR)

Pinout options A and C support MR functionality. The Manual Reset (MR) can be utilized by either J2 (option C) or J1 (option A) headers. By installing a shunt jumper on pins 5-6 of J1 or J2, the MR pin is connected to ground. Moving the shunt jumper to pins 7-8 will connect the MR pin to VDD. For the TPS35-Q1 and TPS36-Q1 devices, pulling the MR pin LOW will assert the RESET signal and deassert the WDO signal. For the TPS3435-Q1 and TPS3436-Q1 devices, pulling the MR pin LOW will assert the WDO signal. Pulling the MR pin HIGH will return the RESET and WDO outputs to their deasserted states after the tD time delay.