SLVUCG9 October   2022 TPS36-Q1

 

  1.   Abstract
  2. 1Trademarks
  3. 2Introduction
    1. 2.1 Related Documentation
  4. 3Schematic, Bill of Materials, and Layout
    1. 3.1 TPS36Q1EVM Schematic
    2. 3.2 TPS36Q1EVM Bill of Materials
    3. 3.3 Layout and Component Placement
  5. 4EVM Connectors
    1. 4.1 EVM Jumpers
    2. 4.2 EVM Test Points
  6. 5EVM Setup and Operation
    1. 5.1 Input Power (VDD)
    2. 5.2 RESET
    3. 5.3 Manual Reset (MR)
    4. 5.4 SET0 and SET1
    5. 5.5 Watchdog Enable (WD_EN)
    6. 5.6 Watchdog Input (WDI)
    7. 5.7 Watchdog Output (WDO)
    8. 5.8 CRST
    9. 5.9 CWD
  7. 6EVM Performance Results
  8. 7Revision History

Layout and Component Placement

Figure 3-2 and Figure 3-3 show the top and bottom assemblies of the printed circuit board (PCB) to show the component placement on the EVM.

Figure 3-4 and Figure 3-5 show the top and bottom layouts, Figure 3-6 and Figure 3-7 show the top and bottom layers, and Figure 3-8 shows the top solder mask of the EVM.

GUID-DEEFDF70-F0CB-4AFD-BF2B-453C1A7B2711-low.pngFigure 3-2 Component Placement—Top Assembly
GUID-51BD9E91-47A8-454D-81E0-9DDB989A64E3-low.pngFigure 3-4 Layout—Top
GUID-F475EE36-3A01-4AEF-8818-DF40CFF23928-low.pngFigure 3-6 Top Layer
GUID-7917133E-BAE0-40F4-A5D0-C8927AFC525D-low.pngFigure 3-8 Top Solder Mask
GUID-D26733DE-9D6E-429D-92CC-E0DC245B5BD7-low.pngFigure 3-3 Component Placement—Bottom Assembly
GUID-DBF53F38-A489-476F-AF75-FF0965939DE7-low.pngFigure 3-5 Layout—Bottom
GUID-839A2881-6520-4B4D-9AD2-7FDB088C80BF-low.pngFigure 3-7 Bottom Layer