SLVK327 July   2026 TPS7H1301-SP

 

  1.   1
  2.   2
  3.   Trademarks
  4. 1 Introduction
  5. 2 Single-Event Effects (SEE)
  6. 3 Device and Test Board Information
  7. 4 Irradiation Facility and Setup
  8. 5 LETEFF and Range Calculation
  9. 6 Test Setup and Procedures
  10. 7 Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-up (SEL) Results
    2. 7.2 Single-Event Burnout (SEB) and Single-Event Gate Rupture (SEGR) Results
  11. 8 Single-Event Transients (SET)
  12. 9 Event Rate Calculations
  13. 10Summary
  14.   A References

5 LETEFF and Range Calculation

MSU Stack-up Calculator Used to Determine Key Ion ParametersFigure 5-1 MSU Stack-up Calculator Used to Determine Key Ion Parameters

The TPS7H1301-SP is fabricated in the TI Linear BiCMOS 250-nm process with a back-end-of-line (BEOL) stack consisting of 4 levels of standard thickness aluminum. The total stack height from the surface of the passivation to the silicon surface is 10.885μm based on the nominal layer thickness.

Accounting for energy loss through the degrader, copper foil, beam port window, air gap, and the BEOL stack of the TPS7H1301-SP, the effective LET (LETEFF) at the surface of the silicon substrate and the range was determined with:

  • MSU Stack-Up Calculator (provided by MSU FRIB and based on latest SRIM-2013 [7] models)
  • SEUSS 2024 software (provided by TAMU and based on the latest SRIM-2013 [7] models)

The results are shown in Table 5-1.

Table 5-1 Ion LETEFF and Range in Silicon
FacilityBeam Energy (MeV/nucleon)Ion TypeDegrader Steps (#)Degrader Angle (°)Copper Foil Width (μm)Beam Port WindowAir Gap (mm)Angle of IncidenceLETEFF (MeV·cm2/mg)Range in Silicon (μm)
KSEE19.5169Tm--53-mil PEN60074.9790.4
TAMU15165Ho00-1-mil Aramica4007597.2