SLUAAF9 September   2021 UCC28782

 

  1.   Trademarks
  2. 1 Initial Board Visual Inspection and Start-up Check
  3. 2 Typical System Operating Waveforms
    1. 2.1 SBP2 Mode
    2. 2.2 SBP1 Mode
    3. 2.3 LPM mode
    4. 2.4 LPM to ABM Mode Transition
    5. 2.5 ABM Mode
    6. 2.6 ABM to AAM Mode Transition
    7. 2.7 AAM Mode
  4. 3Typical System Protection Waveforms
    1. 3.1 Over-Power Protection (OPP)
    2. 3.2 Output Overvoltage Protection (OVP)
    3. 3.3 Output Short-Circuit Protection (SCP)
  5. 4Common Issues and Solutions
    1. 4.1 VDD Boost Converter Survival Mode
      1. 4.1.1 Survival Mode Due To Boost Inductor DCR Too High.
      2. 4.1.2 System Stays In Survival Mode When the Output Voltage is Low Such as 3.3V/5V/9V
    2. 4.2 10% Load Efficiency Might not Meet spec. in USB-PD Application, Especially at 5 V/9 V Output Condition
    3. 4.3 Transient
      1. 4.3.1 BIN/BSW Pin Damage During LPM to ABM Mode Transition
      2. 4.3.2 SR MOSFET VDS Overstress at Survival Mode
      3. 4.3.3 SR MOSFET Vds Voltage Overstress Due to PWMH Partial Turn On At Load Transition
  6. 5References

4.3.2 SR MOSFET VDS Overstress at Survival Mode

This process could rarely be observed at full load transient to no load, output voltage overshoot results in UCC28782 long time pulse stop, shown in Figure 4-8.VDD drop to around 13-V due to the controller still consume the energy on VDD capacitances even pulse is stopped. While BIN capacitors been over discharged during this time. When survival mode kicks in, most of current flow into BIN pin caps, less current go to SR FET, SR turn on at minimum on time that a reverse current can be seen at it’s turn off edge. This reverse current will trigger next turn on pulse that lead to SR turn on again and again.

GUID-20210804-CA0I-R158-591B-QCXSCT8RKHKB-low.png Figure 4-8 SR Vds Overstress When Survival Mode Kick In
GUID-20210804-CA0I-WN2D-QFBN-RJ5KL2STL3RL-low.png Figure 4-9 SR Vds Overstress – Zoom In

When PWML turn on at SR minimum on time, the shoot through between primary side low side FET and SR FET happen. SR FET voltage over stress due to sharp di/dt on leakage inductance. See in Figure 4-9

Solution:

  1. In series a resistor(~2ohm) on AUX rectifier diode path.
  2. Change the rectifier diode from Schottky to fast recovery diode.

The purpose of two work-arounds is to increase AUX loop impedance to let more current flow into secondary side to prevent SR minimum on time happen. After that, the user have to check at low output voltage no load operation, whether the controller running at survival mode when. Trade-off maybe need to be made between this issue happens and running at survival mode.