SLAA475A October   2010  – March 2019 MSP430L092

 

  1.   MSP430x09x Analog Pool: Feature Set and Advanced Use
    1.     Trademarks
    2. 1 MSP430x09x Overview
    3. 2 Analog Pool (A-Pool)
      1. 2.1  Input Dividers
      2. 2.2  Internal Reference
      3. 2.3  Starting and Stopping the A-Pool
      4. 2.4  Comparator Function
      5. 2.5  8-Bit DAC Function
      6. 2.6  8-Bit ADC Function
        1. 2.6.1 ADC Conversion Using Ramp
          1. 2.6.1.1 ADC Conversion Without Error Compensation
          2. 2.6.1.2 ADC Conversions With Overdrive Compensation
          3. 2.6.1.3 ADC Conversions With Offset Compensation
          4. 2.6.1.4 ADC Conversions With Overall Compensation
          5. 2.6.1.5 Windowed ADC Conversion
        2. 2.6.2 ADC Conversion Using SAR
        3. 2.6.3 Multiple ADC Conversions
        4. 2.6.4 Comparison Between Different Measurement Methods
        5. 2.6.5 Error Dependencies
      7. 2.7  SVM Function
      8. 2.8  Use of Multiple Features
      9. 2.9  Temperature Measurements With the A-Pool
      10. 2.10 Fractional and Integer Number Use
      11. 2.11 APINTB and APFRACTB Use With ATBU and EOCBU
      12. 2.12 A-Pool Trigger Sources
      13. 2.13 Filtering ADC Conversions With Digital Filters
    4. 3 Summary
    5. 4 References
  2.   Revision History

2.6.3 Multiple ADC Conversions

The A-Pool can sample up to four external analog voltages with individual voltage dividers for each input channel. The conversions are done sequentially, and the user applications must select the sample channel. The APINTB register can be used to save the last sampled value during the conversion of the next channel.

The following code shows the sample of three channels (A0 to A2) with different input dividers.

#include "msp430l092.h" unsigned char result[3]; // result array unsigned char i = 0; // counting variable void main( void ) { // Stop watchdog timer to prevent time out reset WDTCTL = WDTPW + WDTHOLD; APCNF = CMPON+DBON+CONVON+APREFON+EOCBU; // Enable comparator on + // Enable DAC buffer + // Enable conversion + // Enable reference + // Enable EOC buffer APVDIV = A0DIV+A1DIV+A2DIV0; // Set A0 to 500mV input range // Set A1 to 500mV input range // Set A2 to 1V input range APINT = 0x00; // Clear ADC-DAC-REG APIE |= EOCIE; // Enable end of conversion interrupt _BIS_SR(GIE); // Switch on global interrupts APCTL = APPSEL0+APPSEL2+OSEL+CBSTP+SBSTP; // Set DAC buffer output to PSEL + // Set A0 to NSEL + // Select output buffer + // Enable Comparator based stop + // Enable Saturation based stop + APCTL |= RUNSTOP; // Start conversion _BIS_SR(LPM0); // Go to LPM0 APINT = 0x00; // clear ADC-DAC-REG APCTL = APPSEL0+APPSEL2+APNSEL0+OSEL+CBSTP+SBSTP; // Set DAC buffer output to PSEL + // Set A1 to NSEL + // Select output buffer + // Enable Comparator based stop + // Enable Saturation based stop + // Inverted comparator output is used + result[0] = APINTB; // Save first value APCTL |= RUNSTOP; // Start conversion _BIS_SR(LPM0); // Go to LPM0 APINT = 0x00; // clear ADC-DAC-REG APCTL = APPSEL0+APPSEL2+APNSEL1+OSEL+CBSTP+SBSTP; // Set DAC buffer output to PSEL + // Set A1 to NSEL + // Select output buffer + // Enable Comparator based stop + // Enable Saturation based stop + // Inverted comparator output is used + result[1] = APINTB; // Save second value APCTL |= RUNSTOP; // Start conversion _BIS_SR(LPM0); // Go to LPM0 result[2] = APINTB; // Save third value APCTL |= RUNSTOP; // Start conversion _BIS_SR(LPM0); // Go to LPM0 asm("nop"); while(1); } #pragma vector=APOOL_VECTOR // A-Pool interrupt service routine __interrupt void APOOL_ISR(void) { switch(__even_in_range(APIV,8)) // Add offset to PC and delete flag { case 0: break; case 2: __bic_SR_register_on_exit(CPUOFF); // Exit LPM0 break; case 4: break; case 6: break; case 8: break; default: break; } }