SDAA162 July   2026 ADS125H18 , ISO7721 , ISO7730 , ISO7731 , SN6505B , SN74LVC1G17 , TUSB320 , TVS3301

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Design Overview and Measurement Performance (Normal Operation)
    1. 1.1 Design Overview
    2. 1.2 EMC Test Board Voltage Measurement Performance During Normal Operation
    3. 1.3 EMC Test Board Current Measurement Performance During Normal Operation
  5. 2EMC Test Board Circuit and PCB Layout Considerations
    1. 2.1 Circuit Design Considerations for EMC Compliance
      1. 2.1.1 High-Voltage Capacitors and Resistors on Every Input Connector Pin
      2. 2.1.2 TVS Diodes
      3. 2.1.3 Protecting the Current Shunt: PTC and Zener Diodes
      4. 2.1.4 Series Resistors on Digital Signals
      5. 2.1.5 Digital Isolation
      6. 2.1.6 Power Supply and Protection
      7. 2.1.7 High-Voltage Capacitors and Resistors for Discharging Path
    2. 2.2 PCB Layout Considerations for EMC Compliance
      1. 2.2.1 PCB Layer Stack-up and Ground Plane
      2. 2.2.2 Avoiding a Long Return Path
      3. 2.2.3 Avoiding 90-Degree Bends in PCB Traces
      4. 2.2.4 Using a Guard Ring to Isolate Interference Signals
      5. 2.2.5 Decoupling Capacitors
      6. 2.2.6 Differential Signal Routing
      7. 2.2.7 Stitching Vias
      8. 2.2.8 Layout for Isolation Barrier
      9. 2.2.9 Component Placement
  6. 3EMC Test System, Standards, and Results
    1. 3.1 EMC Test System
    2. 3.2 EMC Test Standards
    3. 3.3 EMC Test Results
      1. 3.3.1 Electrostatic Discharge (ESD)
      2. 3.3.2 Radiated Immunity (RI)
      3. 3.3.3 Electrical Fast Transients (EFT)
      4. 3.3.4 Surge Immunity (SI)
      5. 3.3.5 Conducted Immunity (CI)
  7. 4Schematic, PCB Layout and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials (BOM)
  8. 5Summary
  9. 6References

2.2.8 Layout for Isolation Barrier

Two important isolation barrier considerations in high voltage PCB design are clearance and creepage. Keep the space across the isolation barrier as wide as possible to meet the shortest clearance and creepage requirements and prevent electrical failure. Use rounded or smoothed corners at the edge of PCB board to avoid capacitive coupling between pours and electric charge accumulation. This guideline is important for passing high voltage and high frequency signal tests, such as electrical fast transients and radiated immunity test. Figure 2-18 shows the isolation barrier design between the ADS125H18 and the PHI controller card, as well as the PCB corner design on the EMC test board.

Isolation Barrier LayoutFigure 2-18 Isolation Barrier Layout.