ZHCSI09S June 2010 – August 2018 TPS65911
The INT1 signal (default active low) warns the host processor of any event that has occurred on the TPS65911 device. The host processor can then poll the interrupt from the interrupt status register through I2C to identify the interrupt source. A low level (default setting) indicates an active interrupt, highlighted in the INT_STS_REG register. The polarity of INT1 can be set programming the IT_POL control bit. INT1 flag active is a POWER ON enable condition during a fixed delay, tDOINT1 (only), when the device is in the OFF state (when NRESPWRON is low).
Any of the interrupt sources can be masked programming the INT_MSK_REG register. When an interrupt is masked its corresponding interrupt status bit is still updated, but the INT1 flag is not activated. Interrupt source masking can be used to mask a device switch-on event. Because interrupt flag active is a POWER ON enable condition, during tDOINT1 delay, any interrupt not masked must be cleared to allow immediate turn off of the device.
For a description of interrupt sources, see Table 6-5.