ZHCSQ77A February   2023  – September 2023 TPS25948

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Electrical Characteristics
    5. 7.5 Timing Requirements
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 8.3.2 Overvoltage Lockout (OVLO)
      3. 8.3.3 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.3.2 Active Current Limiting
        3. 8.3.3.3 Short-Circuit Protection
      4. 8.3.4 Analog Load Current Monitor
      5. 8.3.5 Reverse Current Protection
      6. 8.3.6 Overtemperature Protection (OTP)
      7. 8.3.7 Fault Response and Indication (FLT)
      8. 8.3.8 Supply Good Indication (SPLYGD/SPLYGD)
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single Device, Self-Controlled
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Setting Overvoltage Threshold
        2. 9.3.2.2 Setting Output Voltage Rise Time (tR)
        3. 9.3.2.3 Setting Overcurrent Threshold (ILIM)
        4. 9.3.2.4 Setting Overcurrent Blanking Interval (tITIMER)
      3. 9.3.3 Application Curves
    4. 9.4 Active ORing
    5. 9.5 Priority Power MUXing
    6. 9.6 Parallel Operation
    7. 9.7 USB PD Port Protection
    8. 9.8 Power Supply Recommendations
      1. 9.8.1 Transient Protection
      2. 9.8.2 Output Short-Circuit Measurements
    9. 9.9 Layout
      1. 9.9.1 Layout Guidelines
      2. 9.9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Mechanical, Packaging, and Orderable Information

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9.3.2.2 Setting Output Voltage Rise Time (tR)

For a successful design, the junction temperature of device must be kept below the absolute maximum rating during both dynamic (start-up) and steady-state conditions. Dynamic power stresses often are an order of magnitude greater than the static stresses, so it is important to determine the right start-up time and inrush current limit required with system capacitance to avoid thermal shutdown during start-up.

The slew rate (SR) needed to achieve the desired output rise time can be calculated as:

Equation 9. S R   (V/ms) = V IN   ( V ) t R   ( m s ) = 20   V 12   m s = 1.67   V / m s

The CdVdt needed to achieve this slew rate can be calculated as:

Equation 10. C dVdt   p F = 5000 S R   V / m s = 5000 1.67 = 2994   p F

Choose the nearest standard capacitor value as 3000 pF.

For this slew rate, the inrush current can be calculated as:

Equation 11. I INRUSH   m A = S R   (V/ms) x  C OUT   µ F = 1.67   x   47 = 79   m A  

The average power dissipation inside the part during inrush can be calculated as:

Equation 12. P D INRUSH   W = I INRUSH   A   x   V IN   V 2 = 0.079   x   20 2 = 0.8   W

For the given power dissipation, the thermal shutdown time of the device must be greater than the ramp-up time tR to avoid start-up failure. Figure 9-4 shows the thermal shutdown limit, for 0.8 W of power, the shutdown time is more than 10 s which is very large as compared to tR = 12 ms. Therefore, it is safe to use 12 ms as the startup time for this application.

GUID-20230217-SS0I-JKR0-1G01-SL62LMVX8D0M-low.svg Figure 9-4 Thermal Shut-Down Plot During Inrush