ZHCSPM0B May   2023  – November 2023 TMAG5253

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Magnetic Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Sensitivity Linearity
    2. 7.2 Ratiometric Architecture
    3. 7.3 Sensitivity Temperature Compensation
    4. 7.4 Quiescent Voltage Temperature Drift
    5. 7.5 Power-On Time
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Magnetic Flux Direction
      2. 8.3.2 Hall Element Location
      3. 8.3.3 Magnetic Response
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Selecting the Sensitivity Option
      2. 9.1.2 Temperature Compensation for Magnets
      3. 9.1.3 Adding a Low-Pass Filter
      4. 9.1.4 Designing With Multiple Sensors
      5. 9.1.5 Duty-Cycled, Low-Power Design
    2. 9.2 Typical Applications
      1. 9.2.1 Slide-By Displacement Sensing
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Head-On Displacement Sensing
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 Remote-Sensing Applications
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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7.2 Ratiometric Architecture

The TMAG5253 has a ratiometric analog architecture that scales the quiescent voltage and sensitivity linearly with the power-supply voltage. For example, the quiescent voltage and sensitivity are 5% higher when VCC = 3.465 V compared to VCC = 3.3 V. This ratiometric behavior enables an external ADC to digitize a consistent value regardless of the power-supply voltage tolerance when the ADC uses VCC as its reference.

GUID-20220531-SS0I-HDJL-TWJW-TLG6BNPFWBWB-low.svg Figure 7-2 Sensitivity Ratiometry Error

Use Equation 5 to calculate the sensitivity ratiometry error:

Equation 5. S R E = 1 - S V C C / S V C C , N O M V V C C / V V C C , N O M     ×   100 %

where

  • S(VCC) is the sensitivity at the current VCC voltage
  • S(NOM) is the sensitivity at a nominal VCC voltage
  • VVCC is the current VCC voltage
  • VVCC,NOM is the nominal VCC voltage that is 1.8 V or 3.3 V
GUID-20220531-SS0I-QKBR-NT4P-DXHHRWN5DG2W-low.svg Figure 7-3 Quiescent Ratiometry Error

The TMAG5253 has a ratiometric architecture for the quiescent voltage of the bipolar device option. For the bipolar device option, at 0 mT, the quiescent voltage is typically half of the supply voltage, VCC. Use Equation 6 to calculate the quiescent voltage ratiometry error:

Equation 6. QRE=1-VQ(VCC)/VQ(NOM)VVCC/VVCC,NOM  × 100%

where

  • VQ(VCC) is the quiescent voltage at the current VCC voltage
  • VQ(NOM) is the quiescent voltage at a nominal VCC voltage
  • VCC is the current VCC voltage

  • VVCC,NOM is the nominal VCC voltage that is 1.8 V or 3.3 V