ZHCSV54B July   2006  – March 2024 SN65MLVD047A

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Package Dissipation Ratings
    5. 5.5 Thermal Information
    6. 5.6 Device Electrical Characteristics
    7. 5.7 Device Electrical Characteristics
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Synchroization Clock in AdvancedTCA
      2. 8.1.2 Multipoint Configuration
      3. 8.1.3 Multidrop Configuration
      4. 8.1.4 Unused Channel
  10. Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Multipoint Configuration

The SN65MLVD047A is designed to meet or exceed the requirement of the TIA/EIA−899 (M−LVDS) standard, which allows multipoint communication on a shared bus.

Multipoint is a bus configuration with multiple drivers and receivers present. An example is shown in Figure 8-1. The figure shows transceivers interfacing to the bus, but a combination of drivers, receivers, and transceivers is also possible. Termination resistors need to be placed on each end of the bus, with the termination resistor value matched to the loaded bus impedance.

GUID-8702905F-32F5-414A-A011-B1DE5CAABA3B-low.gif Figure 8-1 Multipoint Architecture