ZHCSBU4E October   2012  – September 2020 MSP430F5358 , MSP430F5359 , MSP430F5658 , MSP430F5659 , MSP430F6458 , MSP430F6459 , MSP430F6658 , MSP430F6659

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 功能方框图
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagrams
    2. 7.2 Signal Descriptions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 8.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 8.6  Low-Power Mode With LCD Supply Currents (Into VCC) Excluding External Current
    7. 8.7  Thermal Resistance Characteristics
    8. 8.8  Schmitt-Trigger Inputs – General-Purpose I/O
    9. 8.9  Inputs – Ports P1, P2, P3, and P4
    10. 8.10 Leakage Current – General-Purpose I/O
    11. 8.11 Outputs – General-Purpose I/O (Full Drive Strength)
    12. 8.12 Outputs – General-Purpose I/O (Reduced Drive Strength)
    13. 8.13 Output Frequency – Ports P1, P2, and P3
    14. 8.14 Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
    15. 8.15 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    16. 8.16 Crystal Oscillator, XT1, Low-Frequency Mode
    17. 8.17 Crystal Oscillator, XT2
    18. 8.18 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    19. 8.19 Internal Reference, Low-Frequency Oscillator (REFO)
    20. 8.20 DCO Frequency
    21. 8.21 PMM, Brownout Reset (BOR)
    22. 8.22 PMM, Core Voltage
    23. 8.23 PMM, SVS High Side
    24. 8.24 PMM, SVM High Side
    25. 8.25 PMM, SVS Low Side
    26. 8.26 PMM, SVM Low Side
    27. 8.27 Wake-up Times From Low-Power Modes
    28. 8.28 Timer_A – Timers TA0, TA1, and TA2
    29. 8.29 Timer_B – Timer TB0
    30. 8.30 Battery Backup
    31. 8.31 USCI (UART Mode)
    32. 8.32 USCI (SPI Master Mode)
    33. 8.33 USCI (SPI Slave Mode)
    34. 8.34 USCI (I2C Mode)
    35. 8.35 LCD_B Operating Characteristics
    36. 8.36 LCD_B Electrical Characteristics
    37. 8.37 12-Bit ADC, Power Supply and Input Range Conditions
    38. 8.38 12-Bit ADC, Timing Parameters
    39. 8.39 12-Bit ADC, Linearity Parameters Using an External Reference Voltage
    40. 8.40 12-Bit ADC, Linearity Parameters Using AVCC as Reference Voltage
    41. 8.41 12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
    42. 8.42 12-Bit ADC, Temperature Sensor and Built-In VMID
    43. 8.43 REF, External Reference
    44. 8.44 REF, Built-In Reference
    45. 8.45 12-Bit DAC, Supply Specifications
    46. 8.46 12-Bit DAC, Linearity Specifications
    47. 8.47 12-Bit DAC, Output Specifications
    48. 8.48 12-Bit DAC, Reference Input Specifications
    49. 8.49 12-Bit DAC, Dynamic Specifications
    50. 8.50 12-Bit DAC, Dynamic Specifications (Continued)
    51. 8.51 Comparator_B
    52. 8.52 Ports PU.0 and PU.1
    53. 8.53 USB Output Ports DP and DM
    54. 8.54 USB Input Ports DP and DM
    55. 8.55 USB-PWR (USB Power System)
    56. 8.56 USB-PLL (USB Phase Locked Loop)
    57. 8.57 Flash Memory
    58. 8.58 JTAG and Spy-Bi-Wire Interface
  9. 9 Detailed Description
    1. 9.1  CPU
    2. 9.2  Instruction Set
    3. 9.3  Operating Modes
    4. 9.4  Interrupt Vector Addresses
    5. 9.5  Memory Organization
    6. 9.6  Bootloader (BSL)
      1. 9.6.1 USB BSL
      2. 9.6.2 UART BSL
    7. 9.7  JTAG Operation
      1. 9.7.1 JTAG Standard Interface
      2. 9.7.2 Spy-Bi-Wire Interface
    8. 9.8  Flash Memory
    9. 9.9  Memory Integrity Detection (MID)
    10. 9.10 RAM
    11. 9.11 Backup RAM
    12. 9.12 Peripherals
      1. 9.12.1  Digital I/O
      2. 9.12.2  Port Mapping Controller
      3. 9.12.3  Oscillator and System Clock
      4. 9.12.4  Power-Management Module (PMM)
      5. 9.12.5  Hardware Multiplier (MPY)
      6. 9.12.6  Real-Time Clock (RTC_B)
      7. 9.12.7  Watchdog Timer (WDT_A)
      8. 9.12.8  System Module (SYS)
      9. 9.12.9  DMA Controller
      10. 9.12.10 Universal Serial Communication Interface (USCI)
      11. 9.12.11 Timer TA0
      12. 9.12.12 Timer TA1
      13. 9.12.13 Timer TA2
      14. 9.12.14 Timer TB0
      15. 9.12.15 Comparator_B
      16. 9.12.16 ADC12_A
      17. 9.12.17 DAC12_A
      18. 9.12.18 CRC16
      19. 9.12.19 Voltage Reference (REF) Module
      20. 9.12.20 LCD_B
      21. 9.12.21 USB Universal Serial Bus
      22. 9.12.22 LDO and PU Port
      23. 9.12.23 Embedded Emulation Module (EEM) (L Version)
      24. 9.12.24 Peripheral File Map
    13. 9.13 Input/Output Diagrams
      1. 9.13.1  Port P1 (P1.0 to P1.7) Input/Output With Schmitt Trigger
      2. 9.13.2  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      3. 9.13.3  Port P3 (P3.0 to P3.7) Input/Output With Schmitt Trigger
      4. 9.13.4  Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger
      5. 9.13.5  Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger
      6. 9.13.6  Port P5 (P5.2 to P5.7) Input/Output With Schmitt Trigger
      7. 9.13.7  Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger
      8. 9.13.8  Port P7 (P7.2) Input/Output With Schmitt Trigger
      9. 9.13.9  Port P7 (P7.3) Input/Output With Schmitt Trigger
      10. 9.13.10 Port P7 (P7.4 to P7.7) Input/Output With Schmitt Trigger
      11. 9.13.11 Port P8 (P8.0 to P8.7) Input/Output With Schmitt Trigger
      12. 9.13.12 Port P9 (P9.0 to P9.7) Input/Output With Schmitt Trigger
      13. 9.13.13 Port PU (PU.0/DP, PU.1/DM, PUR) USB Ports (F665x, F565x)
      14. 9.13.14 Port PU (PU.0 and PU.1) Ports (F645x, F535x)
      15. 9.13.15 Port PJ (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      16. 9.13.16 Port PJ (PJ.1 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    14. 9.14 Device Descriptors
  10. 10Device and Documentation Support
    1. 10.1  Getting Started and Next Steps
    2. 10.2  Device Nomenclature
    3. 10.3  Tools and Software
    4. 10.4  Documentation Support
    5. 10.5  Related Links
    6. 10.6  Community Resources
    7. 10.7  Trademarks
    8. 10.8  静电放电警告
    9. 10.9  Export Control Notice
    10. 10.10 术语表
  11. 11Mechanical, Packaging, and Orderable Information

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9.5 Memory Organization

Table 9-4 summarizes the memory map of all device variants.

Table 9-4 Memory Organization
(1)MSP430F6458
MSP430F5358		MSP430F6459
MSP430F5359		MSP430F6658
MSP430F5658		MSP430F6659
MSP430F5659
Memory (flash)Total Size384KB512KB384KB512KB
Main: interrupt vector00FFFFh to 00FF80h00FFFFh to 00FF80h00FFFFh to 00FF80h00FFFFh to 00FF80h
Main: code memoryBank 3N/A128KB
087FFFh to 068000h		N/A128KB
087FFFh to 068000h
Bank 2128KB
067FFFh to 048000h		128KB
067FFFh-48000h		128KB
067FFFh to 048000h		128KB
067FFFh-48000h
Bank 1128KB
047FFFh to 028000h		128KB
047FFFh to 028000h		128KB
047FFFh to 028000h		128KB
047FFFh to 028000h
Bank 0128KB
027FFFh to 008000h		128KB
027FFFh to 008000h		128KB
027FFFh to 008000h		128KB
027FFFh to 008000h
MID support software (ROM)Total Size1KB
006FFFh to 006C00h		1KB
006FFFh to 006C00h		1KB
006FFFh to 006C00h		1KB
006FFFh to 006C00h
RAMSector 316KB
0FBFFFh to 0F8000h		16KB
0FBFFFh to 0F8000h		16KB
0FBFFFh to 0F8000h		16KB
0FBFFFh to 0F8000h
Sector 2N/A16KB
0F7FFFh to 0F4000h		N/A16KB
0F7FFFh to 0F4000h
Sector 1N/A16KB
0F3FFFh to 0F0000h		N/A16KB
0F3FFFh to 0F0000h
Sector 016KB
0063FFh to 002400h
(mirrored at address range
0FFFFFh to 0FC000h)		16KB
0063FFh to 002400h
(mirrored at address range
0FFFFFh to 0FC000h)		16KB
0063FFh to 002400h
(mirrored at address range
0FFFFFh to 0FC000h)		16KB
0063FFh to 002400h
(mirrored at address range
0FFFFFh to 0FC000h)
RAM(3)Sector 72KB
0023FFh to 001C00h		2KB
0023FFh to 001C00h		N/AN/A
USB RAM(2)Sector 7N/AN/A2KB
0023FFh to 001C00h		2KB
0023FFh to 001C00h
Information memory (flash)Info A128 bytes
0019FFh to 001980h		128 bytes
0019FFh to 001980h		128 bytes
0019FFh to 001980h		128 bytes
0019FFh to 001980h
Info B128 bytes
00197Fh to 001900h		128 bytes
00197Fh to 001900h		128 bytes
00197Fh to 001900h		128 bytes
00197Fh to 001900h
Info C128 bytes
0018FFh to 001880h		128 bytes
0018FFh to 001880h		128 bytes
0018FFh to 001880h		128 bytes
0018FFh to 001880h
Info D128 bytes
00187Fh to 001800h		128 bytes
00187Fh to 001800h		128 bytes
00187Fh to 001800h		128 bytes
00187Fh to 001800h
Bootloader (BSL) memory (flash)BSL 3512 bytes
0017FFh to 001600h		512 bytes
0017FFh to 001600h		512 bytes
0017FFh to 001600h		512 bytes
0017FFh to 001600h
BSL 2512 bytes
0015FFh to 001400h		512 bytes
0015FFh to 001400h		512 bytes
0015FFh to 001400h		512 bytes
0015FFh to 001400h
BSL 1512 bytes
0013FFh to 001200h		512 bytes
0013FFh to 001200h		512 bytes
0013FFh to 001200h		512 bytes
0013FFh to 001200h
BSL 0512 bytes
0011FFh to 001000h		512 bytes
0011FFh to 001000h		512 bytes
0011FFh to 001000h		512 bytes
0011FFh to 001000h
PeripheralsSize4KB
000FFFh to 000000h		4KB
000FFFh to 000000h		4KB
000FFFh to 000000h		4KB
000FFFh to 000000h
(1) N/A = Not available
(2) Only available on F6659, F6658, F5659, F5658 devices. USB RAM can be used as general-purpose RAM when not used for USB operation.
(3) Only available on F6459, F6458, F5359, F5358 devices.