ZHCSOS0C august 2021 – june 2023 MCF8316A
PRODUCTION DATA
DEVICE_CONTROL Registers lists the memory-mapped registers for the Device_Control registers. All register offset addresses not listed in DEVICE_CONTROL Registers should be considered as reserved locations and the register contents should not be modified.
Address | Acronym | Register Name | Section |
---|---|---|---|
EAh | DEV_CTRL | DEV_CTRL Register (Address = EAh) [Reset = 00000000h] |
Complex bit access types are encoded to fit into small table cells. Device_Control Access Type Codes shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |
DEV_CTRL is shown in DEV_CTRL Register and described in DEV_CTRL Register Field Descriptions.
Return to the Summary Table.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
EEPROM_WRT | EEPROM_READ | CLR_FLT | CLR_FLT_RETRY_COUNT | EEPROM_WRITE_ACCESS_KEY | |||
R/W-0h | R/W-0h | W-0h | W-0h | W-0h | |||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
EEPROM_WRITE_ACCESS_KEY | FORCED_ALIGN_ANGLE | ||||||
W-0h | W-0h | ||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
FORCED_ALIGN_ANGLE | WATCHDOG_TICKLE | RESERVED | |||||
W-0h | R/W-0h | W-0h | |||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | |||||||
W-0h | |||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31 | EEPROM_WRT | R/W | 0h | Write the configuration to EEPROM |
30 | EEPROM_READ | R/W | 0h | Read the default configuration from EEPROM |
29 | CLR_FLT | W | 0h | Clears all faults |
28 | CLR_FLT_RETRY_COUNT | W | 0h | Clears fault retry count |
27-20 | EEPROM_WRITE_ACCESS_KEY | W | 0h | EEPROM write access key |
19-11 | FORCED_ALIGN_ANGLE | W | 0h | 9-bit value (in °) used during forced align state ( FORCE_ALIGN_EN = 1) Angle applied (°) = FORCED_ALIGN_ANGLE % 360° |
10 | WATCHDOG_TICKLE | R/W | 0h | RAM bit to tickle watchdog in I2C mode. This bit should be written to 1b by external controller every EXT_WD_CONFIG. MCF8316A will reset this bit to 0b. |
9-0 | RESERVED | W | 0h | Reserved |