9.4.4.1 DCO Frequency Step Size
Equation 12 shows the formula to compute the DPLL_FDEV register value required to meet the specified DCO frequency step size in ppb (part-per-billion) when DCO mode is enabled for the DPLL.
Equation 12. DPLL_FDEV = (Reqd_ppb / 10
9) × DEN
DPLL × f
VCO1 / (2 × PR
DPLL) / (f
REF / R
REF)
where
- DPLL_FDEV: Frequency deviation value (0 to 238- 1)
- Reqd_ppb: Required DCO frequency step size (in ppb)
- DENDPLL: DPLL FB divider denominator value (1 to 240)
- fVCO1: VCO1 frequency
- PR: DPLL feedback prescaler divide value (2 to 17)
- fREF: PRIREF or SECREF input frequency
- Rx: PRIREF or SECREF input divide value (1 to 216- 1)