ZHCSK16A October 2017 – July 2019 LMK04228
PRODUCTION DATA.
BIT | NAME | DESCRIPTION | |
---|---|---|---|
7:3 | N/A | Reserved | |
2 | RB_PLL2_LD_LOST | This is set when PLL2 DLD edge falls. Does not set if cleared while PLL2 DLD is low. | |
1 | RB_PLL2_LD | Read back 0: PLL2 DLD is low.
Read back 1: PLL2 DLD is high. |
|
0 | CLR_PLL2_LD_LOST | To reset RB_PLL2_LD_LOST, write CLR_PLL2_LD_LOST with 1 and then 0.
0: RB_PLL2_LD_LOST will be set on next falling PLL2 DLD edge. 1: RB_PLL2_LD_LOST is held clear (0). User must clear this bit to allow RB_PLL2_LD_LOST to become set again. |