ZHCSUG9 January   2024 LMG3100R017

ADVANCE INFORMATION  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Propagation Delay and Mismatch Measurement
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Control Inputs
      2. 8.3.2 Start-up and UVLO
      3. 8.3.3 Bootstrap Supply Voltage Clamping
      4. 8.3.4 Level Shift
    4. 8.4 Device Functional Modes
  10.   Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 VCC Bypass Capacitor
        2. 9.2.2.2 Bootstrap Capacitor
        3. 9.2.2.3 Slew Rate Control
        4. 9.2.2.4 Use With Analog Controllers
        5. 9.2.2.5 Power Dissipation
    3.     Power Supply Recommendations
    4. 9.3 Layout
      1. 9.3.1 Layout Guidelines
      2. 9.3.2 Layout Examples
  11. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Package Information
    2. 11.2 Tape and Reel Information

封装选项

机械数据 (封装 | 引脚)
  • VBE|15
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Pin Configuration and Functions

GUID-20230227-SS0I-BXDS-BL8T-WVNVKQQTFM76-low.svg Figure 4-1 VBE Package,15-Pin VQFN(Top View)
Table 4-1 Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
NC 1, 5, 11–13, 15 — Not connected internally. Leave floating.
LI 2 I Low-side gate driver control input.
VCC 3 P 5V device power supply.
AGND 4 G Analog ground.
SRC 6 I/O Source of GaN FET. Internally connected to AGND.
DRN 7 I/O Drain of GaN FET.
HS 8 P Bootstrap voltage ground reference.
HB 9 P High-side gate driver bootstrap rail with HS as the ground reference.
HO 10 O Level shifted high-side gate driver control input.
HI 14 I High-side gate driver control input.
(1) I = Input, O = Output, G = Ground, P = Power