ZHCSNS5A April 2021 – December 2021 DAC53004 , DAC63004
PRODUCTION DATA
The DACx3004 output amplifier and internal reference can be independently powered down through the EN-INT-REF, VOUT-PDN-X, and IOUT-PDN-X bits in the COMMON-CONFIG register, as shown in 图 7-2. At power up, the DAC output and the internal reference are disabled by default. In power-down mode, the DAC outputs (OUTx pins) are in a high-impedance state. To change this state to 10 kΩ-AGND or 100 kΩ-AGND in voltage-output mode (at power up), use the VOUT-PDN-X bits. The power-down state for current-output mode is always high-impedance.
The DAC power-up state can be programmed to any state (power-down or normal mode) using the NVM. Table 7-11 shows the DAC power-down bits. The individual channel power-down bits can be mapped to the GPIO pin using the GPIO-CONFIG register. This function is called sleep mode. In this mode, the internal low-dropout regulator (LDO) and the common functional blocks are still powered-on, and the device draws a maximum of 28 μA of current through the power supply.
| REGISTER | VOUT-PDN-X[1] | VOUT-PDN-X[0] | IOUT-PDN-X | DESCRIPTION |
|---|---|---|---|---|
| COMMON-CONFIG | 0 | 0 | 1 | Power up VOUT-X |
| 0 | 1 | 1 | Power down VOUT-X with 10 kΩ
to AGND. Power down IOUT-X to Hi-Z. |
|
| 1 | 0 | 1 | Power down VOUT-X with 100
kΩ to AGND. Power down IOUT-X to Hi-Z. |
|
| 1 | 1 | 1 | Power down VOUT-X to Hi-Z.
Power down IOUT-X to Hi-Z (default). |
|
| 1 | 1 | 0 | Power down VOUT-X to Hi-Z.
Power up IOUT-X. |