ZHCSEI7B December   2015  – December 2017 CSD95377Q4M

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Powering CSD95377Q4M and Gate Drivers
      2. 7.3.2 Undervoltage Lockout (UVLO) Protection
      3. 7.3.3 PWM Pin
      4. 7.3.4 SKIP# Pin
        1. 7.3.4.1 Zero Crossing (ZX) Operation
      5. 7.3.5 Integrated Boost-Switch
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application Curves
    3. 8.3 System Example
      1. 8.3.1 Power Loss Curves
      2. 8.3.2 Safe Operating Area (SOA) Curves
      3. 8.3.3 Normalized Curves
      4. 8.3.4 Calculating Power Loss and SOA
        1. 8.3.4.1 Design Example
        2. 8.3.4.2 Calculating Power Loss
        3. 8.3.4.3 Calculating SOA Adjustments
  9. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Recommended PCB Design Overview
      2. 9.1.2 Electrical Performance
    2. 9.2 Layout Example
    3. 9.3 Thermal Considerations
  10. 10器件和文档支持
    1. 10.1 接收文档更新通知
    2. 10.2 社区资源
    3. 10.3 商标
    4. 10.4 静电放电警告
    5. 10.5 Glossary
  11. 11机械、封装和可订购信息
    1. 11.1 机械制图
    2. 11.2 建议印刷电路板 (PCB) 焊盘图案
    3. 11.3 建议模版开口

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DPC|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.5 Electrical Characteristics

TA = 25°C, VDD = POR to 5.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PLOSS
Power loss(1) VIN = 12 V, VDD = 5 V, VOUT = 1.8 V, IOUT = 15 A,
ƒSW = 500 kHz, LOUT = 0.29 µH, TJ = 25°C		 1.6 W
Power loss(1) VIN = 12 V, VDD = 5 V, VOUT = 1.8 V, IOUT = 15 A,
ƒSW = 500 kHz, LOUT = 0.29 µH, TJ = 125°C		 1.8 W
VIN
IQ VIN quiescent current PWM = float 1 µA
VDD
IDD Standby supply current PWM = float, VSKIP# = VDD or 0 V 130 µA
VSKIP# = float 8
IDD Operating supply current PWM = 50% duty cycle, ƒSW = 500 kHz 8.6 mA
POWER-ON RESET AND UNDERVOLTAGE LOCKOUT
VDD rising Power-on reset 4.15 V
VDD falling UVLO 3.7 V
Hysteresis 0.2 V
PWM AND SKIP# I/O SPECIFICATIONS
RI Input impedance Pullup to VDD 1700 kΩ
Pulldown (to GND) 800 kΩ
VIH Logic level high 2.65 V
VIL Logic level low 0.6 V
VIHH Hysteresis 0.2 V
VTS Tri-state voltage 1.3 2 V
tTHOLD(off1) Tri-state activation time (falling) PWM 60 ns
tTHOLD(off2) Tri-state activation time (rising) PWM 60 ns
tTSKF Tri-state activation time (falling) SKIP# 1 ns
tTSKR Tri-state activation time (rising) SKIP# 1 µs
t3RD(PWM) Tri-state exit time PWM(2) 100 ns
t3RD(SKIP#) Tri-state exit time SKIP#(2) 50 µs
BOOTSTRAP SWITCH
VFBST Forward voltage IF = 10 mA 120 240 mV
IRLEAK Reverse leakage(2) VBOOT – VDD = 25 V 2 µA
(1) Measurement made with six 10-µF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across VIN to PGND pins.
(2) Specified by design.