ZHCSM61C November   2014  – September 2020 CC3200MOD

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Functional Block Diagrams
  5. Revision History
  6. Device Comparison
    1. 6.1 Related Products
  7. Terminal Configuration and Functions
    1. 7.1 CC3200MOD Pin Diagram
    2. 7.2 Pin Attributes
      1. 7.2.1 Module Pin Attributes
    3. 7.3 Pin Attributes and Pin Multiplexing
    4. 7.4 Recommended Pin Multiplexing Configurations
      1. 7.4.1 ADC Reference Accuracy Specifications
    5. 7.5 Drive Strength and Reset States for Analog-Digital Multiplexed Pins
    6. 7.6 Pad State After Application of Power to Chip, but Before Reset Release
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Power-On Hours (POH)
    4. 8.4  Recommended Operating Conditions
    5. 8.5  Power Consumption Summary
      1. 8.5.1 Current Consumption
    6. 8.6  Brownout and Blackout Conditions
    7. 8.7  WLAN RF Characteristics
      1. 8.7.1 WLAN Receiver Characteristics
      2. 8.7.2 WLAN Transmitter Characteristics
    8. 8.8  Reset Requirement
    9. 8.9  Thermal Resistance Characteristics for MOB and MON Packages
    10. 8.10 Timing and Switching Characteristics
      1. 8.10.1 nRESET
      2. 8.10.2 Wake Up From Hibernate Timing
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Arm® Cortex®-M4 处理器内核子系统
    4. 9.4 CC3200 Device Encryption
    5. 9.5 Wi-Fi® Network Processor Subsystem
    6. 9.6 Power-Management Subsystem
      1. 9.6.1 VBAT Wide-Voltage Connection
    7. 9.7 Low-Power Operating Mode
    8. 9.8 Memory
      1. 9.8.1 External Memory Requirements
      2. 9.8.2 Internal Memory
        1. 9.8.2.1 SRAM
        2. 9.8.2.2 ROM
        3. 9.8.2.3 Memory Map
    9. 9.9 Boot Modes
      1. 9.9.1 Overview
      2. 9.9.2 Invocation Sequence and Boot Mode Selection
      3. 9.9.3 Boot Mode List
  10. 10Applications, Implementation, and Layout
    1. 10.1 Device Connection and Layout Fundamentals
      1. 10.1.1 Power Supply Decoupling and Bulk Capacitors
      2. 10.1.2 Reset
      3. 10.1.3 Unused Pins
      4. 10.1.4 General Layout Recommendations
      5. 10.1.5 Do's and Don'ts
    2. 10.2 Reference Schematics
    3. 10.3 Design Requirements
    4. 10.4 Detailed Design Procedure
    5. 10.5 Layout Recommendations
      1. 10.5.1 RF Section (Placement and Routing)
      2. 10.5.2 Antenna Placement and Routing
      3. 10.5.3 Transmission Line
  11. 11Environmental Requirements and Specifications
    1. 11.1 PCB Bending
    2. 11.2 Handling Environment
      1. 11.2.1 Terminals
      2. 11.2.2 Falling
    3. 11.3 Storage Condition
      1. 11.3.1 Moisture Barrier Bag Before Opened
      2. 11.3.2 Moisture Barrier Bag Open
    4. 11.4 Baking Conditions
    5. 11.5 Soldering and Reflow Condition
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
      2. 12.1.2 Firmware Updates
    2. 12.2 Device Nomenclature
    3. 12.3 Documentation Support
    4. 12.4 Trademarks
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical Drawing
    2. 13.2 Package Option
      1. 13.2.1 Packaging Information
      2. 13.2.2 Tape and Reel Information

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • MOB|63
散热焊盘机械数据 (封装 | 引脚)

Recommended Pin Multiplexing Configurations

Table 7-2 lists the recommended pin multiplexing configurations.

Table 7-2 Recommended Pin Multiplexing Configurations
CC3220MODx RECOMMENDED PINOUT GROUPING USE – EXAMPLES(1)
Home Security High-end ToysWi-Fi Audio ++ IndustrialSensor-TagHome Security ToysWi-Fi Audio ++ IndustrialWi-Fi Remote w/ 7×7 keypad and audioSensor Door-Lock Fire-Alarm Toys w/o CamIndustrial Home AppliancesIndustrial Home Appliances Smart-PlugIndustrial Home AppliancesGPIOs
Cam + I2S (TX or RX) + I2C + SPI + SWD + UART-TX + (App Logger) 2 GPIO + 1 PWM + *4 overlaid wake up from HibI2S (TX and RX) + 1-Ch ADC + 1× 4-wire UART + 1× 2-wire UART + 1-bit SD Card + SPI + I2C + SWD + 3 GPIO + 1 PWM + 1 GPIO with Wake-From-HibI2S (TX and RX) + 2-Ch ADC + 2-wire UART + SPI + I2C + SWD + 2 PMW + 6 GPIO + 3 GPIO with Wake-From-HibCam + I2S (TX or RX) + I2C + SWD + UART-TX + (App Logger) 4 GPIO + 1 PWM + *4 overlaid wake up from HIBI2S (TX and RX) + 1 Ch ADC + 2× 2-wire UART + 1-bit SD Card + SPI + I2C + SWD + 4 GPIO + 1 PWM + 1 GPIO with Wake-From-HibI2S (TX and RX) + 1-Ch ADC + UART (TX Only) I2C + SWD + 15 GPIO + 1 PWM + 1 GPIO with Wake-From-HibI2S (TX or RX) + 2-Ch ADC + 2-wire UART + SPI + I2C + 3 PMW + 3 GPIO with Wake-From-Hib + 5 GPIO SWD +4-Ch ADC + 1× 4-wire UART + 1× 2-wire UART + SPI + I2C + SWD + 1 PWM + 6 GPIO + 1 GPIO with Wake-From-Hib3-Ch ADC + 2-wire UART + SPI + I2C + SWD + 3 PWM + 9 GPIO + 2 GPIO with Wake-From-Hib2-Ch ADC + 2-wire UART + I2C + SWD + 3 PWM + 11 GPIO + 5 GPIO with Wake-From-Hib
PinPinout 11Pinout 10Pinout 9Pinout 8Pinout 7Pinout 6Pinout 5Pinout 4Pinout 3Pinout 2Pinout 1
GPIO_30GSPI-MISOMCASP-ACLKXMCASP-ACLKXGPIO_30GPIO_30GPIO_30GPIO_30UART0-TXGPIO_30UART0-TXGPIO_30
GPIO_0GSPI-CSMcASP-D1 (RX)McASP-D1McASP-D1McASP-D1McASP-D1McASP-D1UART0-CTSGPIO_0GPIO_0GPIO_0
GPIO_1pCLK (PIXCLK)UART0-TXUART0-TXPIXCLKUART0-TXUART0-TXUART0-TXGPIO-1UART0-TXGPIO_1GPIO_1
GPIO_2(wake) GPIO2UART0-RXUART0-RX(wake) GPIO2UART0-RXGPIO_2UART0-RXADC-0UART0-RX(wake) GPIO_2(wake) GPIO_2
GPIO_3pDATA7 (D3)UART1-TXADC-CH1pDATA7 (D3)UART1-TXGPIO_3ADC-1ADC-1ADC-1ADC-1GPIO_3
GPIO_4pDATA6 (D2)UART1-RX(wake) GPIO_4pDATA6 (D2)UART1-RXGPIO_4(wake) GPIO_4ADC-2ADC-2(wake) GPIO_4(wake) GPIO_4
GPIO_5pDATA5 (D1)ADC-3ADC-3pDATA5 (D1)ADC-3ADC-3ADC-3ADC-3ADC-3ADC-3GPIO_5
GPIO_6pDATA4 (D0)UART1-CTSGPIO_6pDATA4 (D0)GPIO_6GPIO_6GPIO_6UART0-RTSGPIO_6GPIO_6GPIO_6
GPIO_7McASP-ACLKXUART1-RTSGPIO_7McASP-ACLKXMcASP-ACLKXMcASP-ACLKXMcASP-ACLKXGPIO_7GPIO_7GPIO_7GPIO_7
GPIO_8McASP-AFSXSDCARD-IRQMcASP-AFSXMcASP-AFSXSDCARD-IRQGPIO_8GPIO_8GPIO_8GPIO_8GPIO_8GPIO_8
GPIO_9McASP-D0SDCARD-DATAGT_PWM5McASP-D0SDCARD-DATAGPIO_9GT_PWM5GT_PWM5GT_PWM5GT_PWM5GPIO_9
GPIO_10UART1-TXSDCARD-CLKGPIO_10UART1-TXSDCARD-CLKGPIO_10GT_PWM6UART1-TXGT_PWM6GPIO_10GPIO_10
GPIO_11(wake) pXCLK (XVCLK)SDCARD-CMD(wake) GPIO_11(wake) pXCLK (XVCLK)SDCARD-CMDGPIO_11(wake) GPIO_11UART1-RX(wake) GPIO_11(wake) GPIO_11(wake) GPIO_11
GPIO_12pVS (VSYNC)I2C-SCLI2C-SCLpVS (VSYNC)I2C-SCLGPIO_12I2C-SCLI2C-SCLI2C-SCLGPIO_12GPIO_12
GPIO_13(wake) pHS (HSYNC)I2C-SDAI2C-SDA(wake) pHS (HSYNC)I2C-SDAGPIO_13I2C-SDAI2C-SDAI2C-SDA(wake) GPIO_13(wake) GPIO_13
GPIO_14pDATA8 (D4)GSPI-CLKGSPI-CLKpDATA8 (D4)GSPI-CLKI2C-SCLGSPI-CLKGSPI-CLKGSPI-CLKI2C-SCLGPIO_14
GPIO_15pDATA9 (D5)GSPI-MISOGSPI-MISOpDATA9 (D5)GSPI-MISOI2C-SDAGSPI-MISOGSPI-MISOGSPI-MISOI2C-SDAGPIO_15
GPIO_16pDATA10 (D6)GSPI-MOSIGSPI-MOSIpDATA10 (D6)GSPI-MOSIGPIO_16GSPI-MOSIGSPI-MOSIGSPI-MOSIGPIO_16GPIO_16
GPIO_17(wake) pDATA11 (D7)GSPI-CSGSPI-CS(wake) pDATA11 (D7)GSPI-CSGPIO_17GSPI-CSGSPI-CSGSPI-CS(wake) GPIO_17(wake) GPIO_17
GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22GPIO_22
GPIO_23I2C-SCLGPIO_23GPIO_23I2C-SCLGPIO_23GPIO_23GPIO_23GPIO_23GPIO_23GPIO_23GPIO_23
GPIO_24I2C-SDA(wake) GPIO_24(wake) GPIO_24I2C-SDA(wake) GPIO_24(wake) GPIO_24(wake) GPIO_24(wake) GPIO_24(wake) GPIO_24GT-PWM0(wake) GPIO_24
JTAG_TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCKSWD-TCK
JTAG_TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMSSWD-TMS
GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28GPIO_28
GPIO_25GT_PWM2GT_PWM2GT_PWM2GT_PWM2GT_PWM2GT_PWM2GT_PWM2GT_PWM2GT_PWM2GT_PWM2GPIO_25 out only
Pins marked wake can be configured to wake up the chip from HIBERNATE or LPDS state. In the current silicon revision, any wake pin can trigger wake up from HIBERNATE. The wake-up monitor in the hibernate control module logically ORs these pins applying a selection mask. However, wake up from LPDS state can be triggered only by one of the wake-up pins that can be configured before entering LPDS. The core digital wake-up monitor use a mux to select one of these pins to monitor.