ZHCSSG0B December   2022  – April 2024 CC1314R10

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 功能方框图
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagram—RGZ Package (Top View)
    2. 6.2 Signal Descriptions—RGZ Package
    3. 6.3 Connections for Unused Pins and Modules—RGZ Package
    4. 6.4 Pin Diagram—RSK Package (Top View)
    5. 6.5 Signal Descriptions—RSK Package
    6. 6.6 Connection of Unused Pins and Module—RSK Package
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Power Supply and Modules
    5. 7.5  Power Consumption—Power Modes
    6. 7.6  Power Consumption—Radio Modes
    7. 7.7  Nonvolatile (Flash) Memory Characteristics
    8. 7.8  Thermal Resistance Characteristics
    9. 7.9  RF Frequency Bands
    10. 7.10 861MHz to 1054MHz—Receive (RX)
    11. 7.11 861MHz to 1054MHz—Transmit (TX) 
    12. 7.12 861MHz to 1054MHz - PLL Phase Noise Wideband Mode
    13. 7.13 861MHz to 1054MHz - PLL Phase Noise Narrowband Mode
    14. 7.14 Timing and Switching Characteristics
      1. 7.14.1 Reset Timing
      2. 7.14.2 Wakeup Timing
      3. 7.14.3 Clock Specifications
        1. 7.14.3.1 48MHz Clock Input (TCXO)
        2. 7.14.3.2 48MHz Crystal Oscillator (XOSC_HF)
        3. 7.14.3.3 48MHz RC Oscillator (RCOSC_HF)
        4. 7.14.3.4 2MHz RC Oscillator (RCOSC_MF)
        5. 7.14.3.5 32.768 kHz Crystal Oscillator (XOSC_LF)
        6. 7.14.3.6 32 kHz RC Oscillator (RCOSC_LF)
      4. 7.14.4 Serial Peripheral Interface (SPI) Characteristics
        1. 7.14.4.1 SPI Characteristics
        2. 7.14.4.2 SPI Master Mode
        3. 7.14.4.3 SPI Master Mode Timing Diagrams
        4. 7.14.4.4 SPI Slave Mode
        5. 7.14.4.5 SPI Slave Mode Timing Diagrams
      5. 7.14.5 UART
        1. 7.14.5.1 UART Characteristics
    15. 7.15 Peripheral Characteristics
      1. 7.15.1 ADC
        1. 7.15.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 7.15.2 DAC
        1. 7.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 7.15.3 Temperature and Battery Monitor
        1. 7.15.3.1 Temperature Sensor
        2. 7.15.3.2 Battery Monitor
      4. 7.15.4 Comparators
        1. 7.15.4.1 Low-Power Clocked Comparator
        2. 7.15.4.2 Continuous Time Comparator
      5. 7.15.5 Current Source
        1. 7.15.5.1 Programmable Current Source
      6. 7.15.6 GPIO
        1. 7.15.6.1 GPIO DC Characteristics
    16. 7.16 Typical Characteristics
      1. 7.16.1 MCU Current
      2. 7.16.2 RX Current
      3. 7.16.3 TX Current
      4. 7.16.4 RX Performance
      5. 7.16.5 TX Performance
      6. 7.16.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Proprietary Radio Formats
    4. 8.4  Memory
    5. 8.5  Sensor Controller
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Serial Peripherals and I/O
    9. 8.9  Battery and Temperature Monitor
    10. 8.10 µDMA
    11. 8.11 Debug
    12. 8.12 Power Management
    13. 8.13 Clock Systems
    14. 8.14 Network Processor
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Tools and Software
      1. 10.1.1 SimpleLink™ Microcontroller Platform
    2. 10.2 Documentation Support
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

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8.8 Serial Peripherals and I/O

The SPI interface provides a standardized synchronous serial interface to communicate with devices compatible with SPI (3 and 4 wire), MICROWIRE and TI Synchronous Serial Format. The SPIs support master/slave operation up to 12MHz, programmable clock bit rate with prescaler, as well as configurable phase and polarity.

The UART interface implements universal asynchronous receiver and transmitter functions. The UART supports flexible baud-rate generation up to a maximum of 3Mbps with FIFO, multiple data sizes, stop, and parity bits as well as hardware handshake.

The I2S interface provides a standardized interface to exchange digital audio with devices compatible with this standard, including ADCs, DACs, and CODECs. The I2S can also receive pulse-density modulation (PDM) data from devices such as digital microphones and perform conversion to PCM data.

The I2C interface enables low-speed serial communications with devices compatible with the I2C standard. The I2C interface can handle both standard (100kHz) and fast (400kHz) speeds, as well as four modes of operation: master transmit/receive and slave transmit/receive.

The I/O controller (IOC) controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a programmable pullup and pulldown function, and can generate an interrupt on a negative or positive edge (configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs have high-drive capabilities, which are marked in bold in Section 6. All digital peripherals can be connected to any digital pin on the device.